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Message-ID: <20231117105635.343-2-quic_sibis@quicinc.com>
Date: Fri, 17 Nov 2023 16:26:32 +0530
From: Sibi Sankar <quic_sibis@...cinc.com>
To: <andersson@...nel.org>, <konrad.dybcio@...aro.org>,
<will@...nel.org>, <robin.murphy@....com>, <joro@...tes.org>,
<robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>
CC: <agross@...nel.org>, <vkoul@...nel.org>, <quic_gurus@...cinc.com>,
<conor+dt@...nel.org>, <quic_rjendra@...cinc.com>,
<abel.vesa@...aro.org>, <linux-arm-msm@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<dmaengine@...r.kernel.org>, <iommu@...ts.linux.dev>,
<quic_tsoni@...cinc.com>, <neil.armstrong@...aro.org>,
Sibi Sankar <quic_sibis@...cinc.com>
Subject: [PATCH V2 1/4] dt-bindings: arm-smmu: Add compatible for X1E80100 SoC
From: Rajendra Nayak <quic_rjendra@...cinc.com>
Add the SoC specific compatible for X1E80100 implementing arm,mmu-500.
Signed-off-by: Rajendra Nayak <quic_rjendra@...cinc.com>
Co-developed-by: Sibi Sankar <quic_sibis@...cinc.com>
Signed-off-by: Sibi Sankar <quic_sibis@...cinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
---
v2:
* Update the part number from sc8380xp to x1e80100.
* Pickup Rbs.
Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index aa9e1c0895a5..7ae4f65fe236 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -56,6 +56,7 @@ properties:
- qcom,sm8350-smmu-500
- qcom,sm8450-smmu-500
- qcom,sm8550-smmu-500
+ - qcom,x1e80100-smmu-500
- const: qcom,smmu-500
- const: arm,mmu-500
@@ -475,6 +476,7 @@ allOf:
- qcom,sm8350-smmu-500
- qcom,sm8450-smmu-500
- qcom,sm8550-smmu-500
+ - qcom,x1e80100-smmu-500
then:
properties:
clock-names: false
--
2.17.1
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