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Message-ID: <20231117113931.26660-2-quic_sibis@quicinc.com>
Date: Fri, 17 Nov 2023 17:09:27 +0530
From: Sibi Sankar <quic_sibis@...cinc.com>
To: <andersson@...nel.org>, <konrad.dybcio@...aro.org>,
<robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
<catalin.marinas@....com>, <ulf.hansson@...aro.org>
CC: <agross@...nel.org>, <conor+dt@...nel.org>,
<ayan.kumar.halder@....com>, <j@...nau.net>,
<dmitry.baryshkov@...aro.org>, <nfraprado@...labora.com>,
<m.szyprowski@...sung.com>, <u-kumar1@...com>, <peng.fan@....com>,
<lpieralisi@...nel.org>, <quic_rjendra@...cinc.com>,
<abel.vesa@...aro.org>, <linux-arm-msm@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>, <quic_tsoni@...cinc.com>,
<neil.armstrong@...aro.org>, Sibi Sankar <quic_sibis@...cinc.com>
Subject: [PATCH V2 1/5] dt-bindings: arm: cpus: Add qcom,oryon compatible
From: Rajendra Nayak <quic_rjendra@...cinc.com>
These are the CPU cores in Qualcomm's X1E80100 SoC.
Signed-off-by: Rajendra Nayak <quic_rjendra@...cinc.com>
Signed-off-by: Sibi Sankar <quic_sibis@...cinc.com>
---
v2:
* Update the part number from sc8380xp to x1e80100.
Documentation/devicetree/bindings/arm/cpus.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml
index ffd526363fda..cc5a21b47e26 100644
--- a/Documentation/devicetree/bindings/arm/cpus.yaml
+++ b/Documentation/devicetree/bindings/arm/cpus.yaml
@@ -198,6 +198,7 @@ properties:
- qcom,kryo660
- qcom,kryo685
- qcom,kryo780
+ - qcom,oryon
- qcom,scorpion
enable-method:
--
2.17.1
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