linux-kernel - [PATCH 0/4] stm32: add support for STM32MP25 BSEC to control OTP data

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Message-ID: <20231117143338.1173475-1-patrick.delaunay@foss.st.com>
Date:   Fri, 17 Nov 2023 15:33:33 +0100
From:   Patrick Delaunay <patrick.delaunay@...s.st.com>
To:     Alexandre TORGUE <alexandre.torgue@...s.st.com>,
        Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Maxime Coquelin <mcoquelin.stm32@...il.com>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will@...nel.org>,
        Fabrice Gasnier <fabrice.gasnier@...s.st.com>
CC:     Patrick Delaunay <patrick.delaunay@...s.st.com>,
        Arnd Bergmann <arnd@...db.de>,
        Bjorn Andersson <quic_bjorande@...cinc.com>,
        Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Konrad Dybcio <konrad.dybcio@...aro.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        Marek Szyprowski <m.szyprowski@...sung.com>,
        Neil Armstrong <neil.armstrong@...aro.org>,
        Nícolas F. R. A. Prado 
        <nfraprado@...labora.com>, Peng Fan <peng.fan@....com>,
        Udit Kumar <u-kumar1@...com>, <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>,
        <linux-stm32@...md-mailman.stormreply.com>
Subject: [PATCH 0/4] stm32: add support for STM32MP25 BSEC to control OTP data


Non volatile memory area is available on STM32MP25 with OTP in BSEC.

The 12 Kbits of OTP (effective) for STM32MP25x SoC Family
are organized into the following regions:
- lower OTP (OTP0 to OTP127) = 4096 lower OTP bits,
  bitwise (1-bit) programmable
- mid OTP (OTP128 to OTP255) = 4096 middle OTP bits,
  bulk (32-bit) programmable
- upper OTP (OTP256 to OTP383) = 4096 upper OTP bits,
  bulk (32-bit) programmable,
  only accessible when BSEC is in closed state.

BSEC is only accessible by secure world, so the OTP access is done
by driver with OP-TEE TA, as on STM32MP13x family.



Patrick Delaunay (4):
  dt-bindings: nvmem: add new stm32mp25 compatible for stm32-romem
  nvmem: stm32: add support for STM32MP25 BSEC to control OTP data
  arm64: defconfig: enable NVMEM STM32 ROMEM for stm32mp25
  nvmem: add bsec support to stm32mp25

 .../bindings/nvmem/st,stm32-romem.yaml           |  1 +
 arch/arm64/boot/dts/st/stm32mp251.dtsi           | 16 ++++++++++++++++
 arch/arm64/configs/defconfig                     |  1 +
 drivers/nvmem/stm32-romem.c                      | 16 ++++++++++++++++
 4 files changed, 34 insertions(+)

-- 
2.25.1