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Message-ID: <4bf6e5c2-56ef-717b-88a8-db05b07a33ff@quicinc.com>
Date: Mon, 20 Nov 2023 12:04:59 +0530
From: Md Sadre Alam <quic_mdalam@...cinc.com>
To: Mark Brown <broonie@...nel.org>
CC: <agross@...nel.org>, <andersson@...nel.org>,
<konrad.dybcio@...aro.org>, <robh+dt@...nel.org>,
<conor+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
<miquel.raynal@...tlin.com>, <richard@....at>, <vigneshr@...com>,
<linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <linux-mtd@...ts.infradead.org>,
<linux-spi@...r.kernel.org>, <quic_srichara@...cinc.com>,
<qpic_varada@...cinc.com>
Subject: Re: [RFC PATCH 4/5] spi: qpic: Add support for qpic spi nand driver
On 11/3/2023 6:17 PM, Mark Brown wrote:
> On Fri, Nov 03, 2023 at 04:50:54PM +0530, Md Sadre Alam wrote:
>> On 10/31/2023 7:53 PM, Mark Brown wrote:
>>> On Tue, Oct 31, 2023 at 05:33:06PM +0530, Md Sadre Alam wrote:
>
>>>> + ret = submit_descs(snandc);
>>>> + if (ret)
>>>> + dev_err(snandc->dev, "failure in sbumitting spiinit descriptor\n");
>>>> +
>>>> + free_descs(snandc);
>
>>> This seems to be doing a bit more than I would expect an init function
>>> to, and it's very surprising to see the descriptors freed immediately
>>> after something called a submit (which suggests that the descriptors are
>>> still in flight).
>
>> Our controller supports only bam mode , that means for writing/reading even
>> single register we have to use bam.
>> submit_descs() is synchronous so I/O is complete when it returns.
>> Hence freeing the descriptor after it.
>
> That seems like the BAM API is very confusing and error prone.
Sorry for late reply
Yeah, By HW itself its complex due to security reason. We are trying
to write a BAM common API interface for all the driver which will use BAM.
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