linux-kernel - Re: [PATCH V2 5/5] arm64: defconfig: Enable X1E80100 SoC base configs

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Date:   Mon, 20 Nov 2023 10:12:08 +0100
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Sibi Sankar <quic_sibis@...cinc.com>, andersson@...nel.org,
        konrad.dybcio@...aro.org, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, catalin.marinas@....com,
        ulf.hansson@...aro.org
Cc:     agross@...nel.org, conor+dt@...nel.org, ayan.kumar.halder@....com,
        j@...nau.net, dmitry.baryshkov@...aro.org, nfraprado@...labora.com,
        m.szyprowski@...sung.com, u-kumar1@...com, peng.fan@....com,
        lpieralisi@...nel.org, quic_rjendra@...cinc.com,
        abel.vesa@...aro.org, linux-arm-msm@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, quic_tsoni@...cinc.com,
        neil.armstrong@...aro.org
Subject: Re: [PATCH V2 5/5] arm64: defconfig: Enable X1E80100 SoC base configs

On 17/11/2023 12:39, Sibi Sankar wrote:
> From: Rajendra Nayak <quic_rjendra@...cinc.com>
> 
> Enable GCC, Pinctrl and Interconnect configs for Qualcomm's X1E80100 SoC
> which is required to boot X1E80100 QCP/CRD boards to a console shell. The
> configs are required to be marked as builtin and not modules due to the
> console driver dependencies.
> 
> Signed-off-by: Rajendra Nayak <quic_rjendra@...cinc.com>
> Co-developed-by: Sibi Sankar <quic_sibis@...cinc.com>
> Signed-off-by: Sibi Sankar <quic_sibis@...cinc.com>
> ---
> 
> v2:
> * Update the part number from sc8380xp to x1e80100.
> * Add additional details to patch 5 commit message. [Konrad/Krzysztof]

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>

Best regards,
Krzysztof