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Message-ID: <32583d1c-942d-40e8-a039-c79f3c63bfa8@foss.st.com>
Date: Mon, 20 Nov 2023 15:15:47 +0100
From: Alexandre TORGUE <alexandre.torgue@...s.st.com>
To: Patrick Delaunay <patrick.delaunay@...s.st.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Maxime Coquelin <mcoquelin.stm32@...il.com>
CC: <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>,
<linux-stm32@...md-mailman.stormreply.com>
Subject: Re: [PATCH 4/4] nvmem: add bsec support to stm32mp25
Hi Patrick
On 11/17/23 15:33, Patrick Delaunay wrote:
> Add BSEC support to STM32MP25 SoC family with SoC information:
> - RPN = Device part number (BSEC_OTP_DATA9)
> - PKG = package data register (Bits 2:0 of BSEC_OTP_DATA122)
>
> Signed-off-by: Patrick Delaunay <patrick.delaunay@...s.st.com>
> ---
DT looks good for me, and yaml verification is passed. Only thing to fix
is the commit title. If you don't have to send a V2 for other remarks
then I will fix during merge else fix it in your v2.
Thanks
Alex
>
> arch/arm64/boot/dts/st/stm32mp251.dtsi | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi
> index 124403f5f1f4..96859d098ef8 100644
> --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi
> +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi
> @@ -140,6 +140,22 @@ sdmmc1: mmc@...20000 {
> };
> };
>
> + bsec: efuse@...00000 {
> + compatible = "st,stm32mp25-bsec";
> + reg = <0x44000000 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + part_number_otp@24 {
> + reg = <0x24 0x4>;
> + };
> +
> + package_otp@1e8 {
> + reg = <0x1e8 0x1>;
> + bits = <0 3>;
> + };
> + };
> +
> syscfg: syscon@...30000 {
> compatible = "st,stm32mp25-syscfg", "syscon";
> reg = <0x44230000 0x10000>;
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