linux-kernel - RE: [PATCH v10 1/8] spi: Add multi-cs memories support in SPI core

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Date:   Tue, 21 Nov 2023 07:18:15 +0000
From:   "Mahapatra, Amit Kumar" <amit.kumar-mahapatra@....com>
To:     Mark Brown <broonie@...nel.org>
CC:     "tudor.ambarus@...aro.org" <tudor.ambarus@...aro.org>,
        "pratyush@...nel.org" <pratyush@...nel.org>,
        "miquel.raynal@...tlin.com" <miquel.raynal@...tlin.com>,
        "richard@....at" <richard@....at>,
        "vigneshr@...com" <vigneshr@...com>,
        "sbinding@...nsource.cirrus.com" <sbinding@...nsource.cirrus.com>,
        "linux-spi@...r.kernel.org" <linux-spi@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "michael@...le.cc" <michael@...le.cc>,
        "linux-mtd@...ts.infradead.org" <linux-mtd@...ts.infradead.org>,
        "nicolas.ferre@...rochip.com" <nicolas.ferre@...rochip.com>,
        "alexandre.belloni@...tlin.com" <alexandre.belloni@...tlin.com>,
        "claudiu.beznea@...on.dev" <claudiu.beznea@...on.dev>,
        "Simek, Michal" <michal.simek@....com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "git (AMD-Xilinx)" <git@....com>,
        "amitrkcian2002@...il.com" <amitrkcian2002@...il.com>
Subject: RE: [PATCH v10 1/8] spi: Add multi-cs memories support in SPI core

Hello Mark,

> -----Original Message-----
> From: Mark Brown <broonie@...nel.org>
> Sent: Monday, November 20, 2023 7:33 PM
> To: Mahapatra, Amit Kumar <amit.kumar-mahapatra@....com>
> Cc: tudor.ambarus@...aro.org; pratyush@...nel.org;
> miquel.raynal@...tlin.com; richard@....at; vigneshr@...com;
> sbinding@...nsource.cirrus.com; linux-spi@...r.kernel.org; linux-
> kernel@...r.kernel.org; michael@...le.cc; linux-mtd@...ts.infradead.org;
> nicolas.ferre@...rochip.com; alexandre.belloni@...tlin.com;
> claudiu.beznea@...on.dev; Simek, Michal <michal.simek@....com>; linux-
> arm-kernel@...ts.infradead.org; git (AMD-Xilinx) <git@....com>;
> amitrkcian2002@...il.com
> Subject: Re: [PATCH v10 1/8] spi: Add multi-cs memories support in SPI core
> 
> On Sat, Nov 18, 2023 at 07:24:39PM +0530, Amit Kumar Mahapatra wrote:
> > AMD-Xilinx GQSPI controller has two advanced mode that allows the
> > controller to consider two flashes as one single device.
> 
> This breaks an x86 allmodconfig build:

The cause of this failure are the following patches, which neglects to 
utilize spi_get_chipselect() for retrieving the CS value. Instead, 
it directly accesses spi->chip_select.

https://lore.kernel.org/all/20230525150659.25409-14-rf@opensource.cirrus.com/
https://lore.kernel.org/all/20230216114410.183489-3-jpanis@baylibre.com/

In my upcoming series, I will address these issues.

Regards,
Amit
> 
> /build/stage/linux/sound/pci/hda/cs35l56_hda_spi.c: In function
> ‘cs35l56_hda_spi
> _probe’:
> /build/stage/linux/sound/pci/hda/cs35l56_hda_spi.c:32:52: error: passing
> argumen t 2 of ‘cs35l56_hda_common_probe’ makes integer from pointer
> without a cast [-We rror=int-conversion]
>    32 |         ret = cs35l56_hda_common_probe(cs35l56, spi->chip_select);
>       |                                                 ~~~^~~~~~~~~~~~~
>       |                                                    |
>       |                                                    u8 * {aka unsigned ch
> ar *}
> In file included from /build/stage/linux/sound/pci/hda/cs35l56_hda_spi.c:12:
> /build/stage/linux/sound/pci/hda/cs35l56_hda.h:45:63: note: expected ‘int’
> but a rgument is of type ‘u8 *’ {aka ‘unsigned char *’}
>    45 | int cs35l56_hda_common_probe(struct cs35l56_hda *cs35l56, int id);
>       |                                                           ~~~~^~