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Message-ID: <09b81f9b-9a06-40a0-811e-a6a00aaa4617@ideasonboard.com>
Date: Tue, 21 Nov 2023 10:48:11 +0200
From: Tomi Valkeinen <tomi.valkeinen@...asonboard.com>
To: Aradhya Bhatia <a-bhatia1@...com>, Nishanth Menon <nm@...com>,
Vignesh Raghavendra <vigneshr@...com>,
Tero Kristo <kristo@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: ti: k3-am65-main: Fix DSS irq trigger type
Hi Vignes, Nishanth,
Will you pick this up?
Tomi
On 06/11/2023 12:20, Aradhya Bhatia wrote:
>
>
> On 06-Nov-23 15:27, Tomi Valkeinen wrote:
>> DSS irq trigger type is set to IRQ_TYPE_EDGE_RISING in the DT file, but
>> the TRM says it is level triggered.
>>
>> For some reason triggering on rising edge results in double the amount
>> of expected interrupts, e.g. for normal page flipping test the number of
>> interrupts per second is 2 * fps. It is as if the IRQ triggers on both
>> edges. There are no other side effects to this issue than slightly
>> increased CPU & power consumption due to the extra interrupt.
>>
>> Switching to IRQ_TYPE_LEVEL_HIGH is correct and fixes the issue, so
>> let's do that.
>>
>> Fixes: fc539b90eda2 ("arm64: dts: ti: am654: Add DSS node")
>> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@...asonboard.com>
>> ---
>
> Reviewed-by: Aradhya Bhatia <a-bhatia1@...com>
>
> Regards
> Aradhya
>
>> arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
>> index bc460033a37a..c98068b6c122 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
>> @@ -1034,7 +1034,7 @@ dss: dss@...0000 {
>> assigned-clocks = <&k3_clks 67 2>;
>> assigned-clock-parents = <&k3_clks 67 5>;
>>
>> - interrupts = <GIC_SPI 166 IRQ_TYPE_EDGE_RISING>;
>> + interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
>>
>> dma-coherent;
>>
>>
>> ---
>> base-commit: ffc253263a1375a65fa6c9f62a893e9767fbebfa
>> change-id: 20231106-am65-dss-clk-edge-7d1bdd7c0f58
>>
>> Best regards,
>
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