lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <ZVzE0c8UsW4HXV_u@hovoldconsulting.com>
Date:   Tue, 21 Nov 2023 15:55:13 +0100
From:   Johan Hovold <johan@...nel.org>
To:     Mrinmay Sarkar <quic_msarkar@...cinc.com>
Cc:     agross@...nel.org, andersson@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
        konrad.dybcio@...aro.org, mani@...nel.org, robh+dt@...nel.org,
        quic_shazhuss@...cinc.com, quic_nitegupt@...cinc.com,
        quic_ramkri@...cinc.com, quic_nayiluri@...cinc.com,
        dmitry.baryshkov@...aro.org, robh@...nel.org,
        quic_krichai@...cinc.com, quic_vbadigan@...cinc.com,
        quic_parass@...cinc.com, quic_schintav@...cinc.com,
        quic_shijjose@...cinc.com,
        Lorenzo Pieralisi <lpieralisi@...nel.org>,
        Krzysztof WilczyƄski <kw@...ux.com>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org
Subject: Re: [PATCH v4 3/3] arm64: dts: qcom: sa8775p: Mark PCIe EP
 controller as cache coherent

On Tue, Nov 21, 2023 at 08:08:13PM +0530, Mrinmay Sarkar wrote:
> The PCIe EP controller on SA8775P supports cache coherency, hence add
> the "dma-coherent" property to mark it as such.
> 
> Signed-off-by: Mrinmay Sarkar <quic_msarkar@...cinc.com>
> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
> ---
>  arch/arm64/boot/dts/qcom/sa8775p.dtsi | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> index 7eab458..ab01efe 100644
> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> @@ -3620,6 +3620,7 @@
>  				<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_PCIE_0 0>;
>  		interconnect-names = "pcie-mem", "cpu-pcie";
>  
> +		dma-coherent;
>  		iommus = <&pcie_smmu 0x0000 0x7f>;
>  		resets = <&gcc GCC_PCIE_0_BCR>;
>  		reset-names = "core";

What tree is this against? 

Both controllers are already marked as dma-coherent in mainline so this
patch makes no sense (and the context also looks wrong).

It was even you added them apparently:

	489f14be0e0a ("arm64: dts: qcom: sa8775p: Add pcie0 and pcie1 nodes")

Johan

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ