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Message-ID: <20231122191259.3021-1-quic_kriskura@quicinc.com>
Date: Thu, 23 Nov 2023 00:42:59 +0530
From: Krishna Kurapati <quic_kriskura@...cinc.com>
To: Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Rob Herring <robh+dt@...nel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>, <quic_wcheng@...cinc.com>
CC: <linux-arm-msm@...r.kernel.org>, <linux-usb@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<quic_ppratap@...cinc.com>, <quic_jackp@...cinc.com>,
Krishna Kurapati <quic_kriskura@...cinc.com>
Subject: [PATCH 0/6] Refine USB interrupt vectors on Qualcomm platforms
Qualcomm targets define the following interrupts for usb wakeup:
{dp/dm}_hs_phy_irq, hs_phy_irq, pwr_event, ss_phy_irq.
But QUSB2 Phy based targets have another interrupt which gets triggered
in response to J/K states on dp/dm pads. Its functionality is replaced
by dp/dm interrupts on Femto/m31/eusb2 phy based targets for wakeup
purposes. Exceptions are some targets like SDM845/SDM670/SM6350 where
dp/dm irq's are used although they are qusb2 phy targets.
Currently in QUSB2 Phy based DT's, te qusb2_phy interrupt is named and
used as "hs_phy_irq" when in fact it is a different interrupt (used by
HW validation folks for debug purposes and not used on any downstream
target qusb/non-qusb).
On some non-QUSB2 targets (like sm8450/sm8550), the pwr_event IRQ was
named as hs_phy_irq and actual pwr_event_irq was skipped.
This series tries to address the discrepancies in the interrupt numbering
adding the missing interrupts and correcting the existing ones.
This series has been compared with downstream counter part and hw specifics
to ensure the numbering is right. Since there is not functionality change
the code has been only compile tested.
However SC8280 is left unchanged. Its primary and secondary controllers
also have hs_phy_irq but they are not added in this series because of
one mismatch with hw specifics which needs to clarified. The control IRQ
added and the interrupts added work fine today. Only the hs_phy_irq needs
to be cleaned up which will be done later.
Krishna Kurapati (6):
dt-bindings: usb: dwc3: Clean up hs_phy_irq in bindings
usb: dwc3: qcom: Rename hs_phy_irq to qusb2_phy_irq
arm64: dts: qcom: Fix hs_phy_irq for QUSB2 targets
arm64: dts: qcom: Fix hs_phy_irq for non-QUSB2 targets
arm64: dts: qcom: Fix hs_phy_irq for SDM670/SDM845/SM6350
arm64: dts: qcom: Add missing interrupts for qcs404/ipq5332
.../devicetree/bindings/usb/qcom,dwc3.yaml | 126 ++++++++++--------
arch/arm/boot/dts/qcom/qcom-sdx55.dtsi | 5 +-
arch/arm/boot/dts/qcom/qcom-sdx65.dtsi | 2 +
arch/arm64/boot/dts/qcom/ipq5332.dtsi | 8 +-
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 15 ++-
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 14 ++
arch/arm64/boot/dts/qcom/msm8953.dtsi | 7 +-
arch/arm64/boot/dts/qcom/msm8996.dtsi | 19 ++-
arch/arm64/boot/dts/qcom/msm8998.dtsi | 7 +-
arch/arm64/boot/dts/qcom/qcs404.dtsi | 16 +++
arch/arm64/boot/dts/qcom/sa8775p.dtsi | 20 ++-
arch/arm64/boot/dts/qcom/sc7180.dtsi | 3 +-
arch/arm64/boot/dts/qcom/sc7280.dtsi | 6 +-
arch/arm64/boot/dts/qcom/sdm630.dtsi | 19 ++-
arch/arm64/boot/dts/qcom/sdm670.dtsi | 5 +-
arch/arm64/boot/dts/qcom/sdm845.dtsi | 10 +-
arch/arm64/boot/dts/qcom/sm6115.dtsi | 9 +-
arch/arm64/boot/dts/qcom/sm6125.dtsi | 9 ++
arch/arm64/boot/dts/qcom/sm6350.dtsi | 7 +-
arch/arm64/boot/dts/qcom/sm6375.dtsi | 4 +-
arch/arm64/boot/dts/qcom/sm8150.dtsi | 10 +-
arch/arm64/boot/dts/qcom/sm8250.dtsi | 4 +
arch/arm64/boot/dts/qcom/sm8350.dtsi | 4 +
arch/arm64/boot/dts/qcom/sm8450.dtsi | 4 +-
arch/arm64/boot/dts/qcom/sm8550.dtsi | 4 +-
drivers/usb/dwc3/dwc3-qcom.c | 22 +--
26 files changed, 252 insertions(+), 107 deletions(-)
--
2.42.0
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