linux-kernel - [PATCH net-next v5 0/2] Fine-Tune Flow Control and Speed Configurations in Microchip KSZ8xxx DSA Driver

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Message-Id: <20231122092545.2895635-1-o.rempel@pengutronix.de>
Date:   Wed, 22 Nov 2023 10:25:42 +0100
From:   Oleksij Rempel <o.rempel@...gutronix.de>
To:     "David S. Miller" <davem@...emloft.net>,
        Andrew Lunn <andrew@...n.ch>,
        Eric Dumazet <edumazet@...gle.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>,
        Vladimir Oltean <olteanv@...il.com>,
        Woojung Huh <woojung.huh@...rochip.com>,
        Arun Ramadoss <arun.ramadoss@...rochip.com>,
        "Russell King (Oracle)" <linux@...linux.org.uk>
Cc:     Oleksij Rempel <o.rempel@...gutronix.de>, kernel@...gutronix.de,
        linux-kernel@...r.kernel.org, netdev@...r.kernel.org,
        UNGLinuxDriver@...rochip.com
Subject: [PATCH net-next v5 0/2] Fine-Tune Flow Control and Speed Configurations in Microchip KSZ8xxx DSA Driver

change v5:
- add Reviewed-by: Vladimir Oltean <olteanv@...il.com>
- use regs[S_BROADCAST_CTRL] instead of REG_SW_CTRL_4 as requested.
- s/synchronous/symmetric/
- make phylink_mac_link_up() not optional, as requested 

change v4:
- instead of downstream/upstream use CPU-port and PHY-port
- adjust comments
- minor fixes

changes v3:
- remove half duplex flow control configuration
- add comments
- s/stram/stream

changes v2:
- split the patch to upstream and downstream part
- add comments
- fix downstream register offset
- fix CPU configuration

This patch set focuses on enhancing the configurability of flow
control, speed, and duplex settings in the Microchip KSZ8xxx DSA driver.

The first patch allows more granular control over the CPU port's flow
control, speed, and duplex settings. The second patch introduces a
method for port configurations for port with integrated PHYs, primarily
concerning flow control based on duplex mode.

Oleksij Rempel (3):
  net: dsa: microchip: ksz8: Make flow control, speed, and duplex on CPU
    port configurable
  net: dsa: microchip: ksz8: Add function to configure ports with
    integrated PHYs
  net: dsa: microchip: make phylink_mac_link_up() not optional

 drivers/net/dsa/microchip/ksz8.h       |   4 +
 drivers/net/dsa/microchip/ksz8795.c    | 133 ++++++++++++++++++++++++-
 drivers/net/dsa/microchip/ksz_common.c |   7 +-
 3 files changed, 138 insertions(+), 6 deletions(-)

-- 
2.39.2