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Message-ID: <71adf98a-1aaa-430f-96fc-be170ceacf78@linaro.org>
Date: Wed, 22 Nov 2023 11:06:50 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Michal Simek <michal.simek@....com>, conor@...nel.org,
linux-kernel@...r.kernel.org, monstr@...str.eu,
michal.simek@...inx.com, git@...inx.com, robh@...nel.org
Cc: Conor Dooley <conor+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v2 2/2] dt-bindings: soc: Add new board description for
MicroBlaze V
On 22/11/2023 10:13, Michal Simek wrote:
> MicroBlaze V is new AMD/Xilinx soft-core 32bit RISC-V processor IP.
> It is hardware compatible with classic MicroBlaze processor. Processor can
> be used with standard AMD/Xilinx IPs including interrupt controller and
> timer.
>
> Signed-off-by: Michal Simek <michal.simek@....com>
> ---
>
> Changes in v2:
> - Put MicroBlaze V description to xilinx.yaml
> - Add qemu target platform as platform used for testing.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Best regards,
Krzysztof
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