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Message-ID: <ZV38GhOK/n47c6ne@linaro.org>
Date: Wed, 22 Nov 2023 15:03:22 +0200
From: Abel Vesa <abel.vesa@...aro.org>
To: Johan Hovold <johan@...nel.org>
Cc: Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Vinod Koul <vkoul@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] phy: qcom-qmp-usb: Add Qualcomm X1E80100 USB3 PHY
support
On 23-11-22 13:56:51, Johan Hovold wrote:
> On Wed, Nov 22, 2023 at 02:05:22PM +0200, Abel Vesa wrote:
> > The X1E80100 platform has two instances of the USB3 UNI phy attached
> > to the multi-port USB controller, add definition for these.
> >
> > Signed-off-by: Abel Vesa <abel.vesa@...aro.org>
> > ---
> > drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 152 ++++++++++++++++++++++++++++++++
> > 1 file changed, 152 insertions(+)
> >
> > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
> > index 02f156298e77..bbeba5722cf0 100644
> > --- a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
> > +++ b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
> > @@ -24,6 +24,7 @@
> > #include "phy-qcom-qmp-pcs-misc-v4.h"
> > #include "phy-qcom-qmp-pcs-usb-v4.h"
> > #include "phy-qcom-qmp-pcs-usb-v5.h"
> > +#include "phy-qcom-qmp-pcs-usb-v7.h"
> >
> > /* QPHY_SW_RESET bit */
> > #define SW_RESET BIT(0)
> > @@ -1138,6 +1139,134 @@ static const struct qmp_phy_init_tbl sc8280xp_usb3_uniphy_pcs_usb_tbl[] = {
> > QMP_PHY_INIT_CFG(QPHY_V5_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL, 0xf8),
> > };
> >
> > +static const struct qmp_phy_init_tbl x1e80100_usb3_uniphy_serdes_tbl[] = {
>
> These tables and...
>
> > @@ -1411,6 +1540,26 @@ static const struct qmp_phy_cfg sc8280xp_usb3_uniphy_cfg = {
> > .regs = qmp_v5_usb3phy_regs_layout,
> > };
> >
> > +static const struct qmp_phy_cfg x1e80100_usb3_uniphy_cfg = {
> > + .lanes = 1,
> > +
> > + .offsets = &qmp_usb_offsets_v5,
> > +
> > + .serdes_tbl = x1e80100_usb3_uniphy_serdes_tbl,
> > + .serdes_tbl_num = ARRAY_SIZE(x1e80100_usb3_uniphy_serdes_tbl),
> > + .tx_tbl = x1e80100_usb3_uniphy_tx_tbl,
> > + .tx_tbl_num = ARRAY_SIZE(x1e80100_usb3_uniphy_tx_tbl),
> > + .rx_tbl = x1e80100_usb3_uniphy_rx_tbl,
> > + .rx_tbl_num = ARRAY_SIZE(x1e80100_usb3_uniphy_rx_tbl),
> > + .pcs_tbl = x1e80100_usb3_uniphy_pcs_tbl,
> > + .pcs_tbl_num = ARRAY_SIZE(x1e80100_usb3_uniphy_pcs_tbl),
> > + .pcs_usb_tbl = x1e80100_usb3_uniphy_pcs_usb_tbl,
> > + .pcs_usb_tbl_num = ARRAY_SIZE(x1e80100_usb3_uniphy_pcs_usb_tbl),
> > + .vreg_list = qmp_phy_vreg_l,
> > + .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l),
> > + .regs = qmp_v5_usb3phy_regs_layout,
> > +};
>
> ...this struct no longer looks like they've been added at the right
> places.
>
> > +
> > static const struct qmp_phy_cfg qmp_v3_usb3_uniphy_cfg = {
> > .lanes = 1,
> >
> > @@ -2247,6 +2396,9 @@ static const struct of_device_id qmp_usb_of_match_table[] = {
> > }, {
> > .compatible = "qcom,sc8280xp-qmp-usb3-uni-phy",
> > .data = &sc8280xp_usb3_uniphy_cfg,
> > + }, {
> > + .compatible = "qcom,x1e80100-qmp-usb3-uni-phy",
> > + .data = &x1e80100_usb3_uniphy_cfg,
>
> Same here, please keep the entries sorted by compatible (and please
> check your other x1e80100 patches for such issues after changing the SoC
> name).
Thanks for reviewing and catching this. Will triple check from now on.
>
> > }, {
> > .compatible = "qcom,sdm845-qmp-usb3-uni-phy",
> > .data = &qmp_v3_usb3_uniphy_cfg,
>
> Johan
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