lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <b85d165d-7f21-5896-a969-1f162903582b@arm.com>
Date:   Fri, 24 Nov 2023 09:52:00 +0000
From:   James Clark <james.clark@....com>
To:     Anshuman Khandual <anshuman.khandual@....com>,
        Namhyung Kim <namhyung@...il.com>
Cc:     linux-arm-kernel@...ts.infradead.org,
        linux-perf-users@...r.kernel.org, suzuki.poulose@....com,
        will@...nel.org, mark.rutland@....com,
        Catalin Marinas <catalin.marinas@....com>,
        Jonathan Corbet <corbet@....net>, linux-doc@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v5 3/3] Documentation: arm64: Document the PMU event
 counting threshold feature



On 23/11/2023 15:45, James Clark wrote:
> 
> 
> On 23/11/2023 05:50, Anshuman Khandual wrote:
>>
>>
>> On 11/21/23 03:01, Namhyung Kim wrote:
>>> On Mon, Nov 13, 2023 at 3:26 AM James Clark <james.clark@....com> wrote:
>>>> Add documentation for the new Perf event open parameters and
>>>> the threshold_max capability file.
>>>>
>>>> Signed-off-by: James Clark <james.clark@....com>
>>>> ---
>>>>  Documentation/arch/arm64/perf.rst | 56 +++++++++++++++++++++++++++++++
>>>>  1 file changed, 56 insertions(+)
>>>>
>>>> diff --git a/Documentation/arch/arm64/perf.rst b/Documentation/arch/arm64/perf.rst
>>>> index 1f87b57c2332..36b8111a710d 100644
>>>> --- a/Documentation/arch/arm64/perf.rst
>>>> +++ b/Documentation/arch/arm64/perf.rst
>>>> @@ -164,3 +164,59 @@ and should be used to mask the upper bits as needed.
>>>>     https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/tools/perf/arch/arm64/tests/user-events.c
>>>>  .. _tools/lib/perf/tests/test-evsel.c:
>>>>     https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/tools/lib/perf/tests/test-evsel.c
>>>> +
>>>> +Event Counting Threshold
>>>> +==========================================
>>>> +
>>>> +Overview
>>>> +--------
>>>> +
>>>> +FEAT_PMUv3_TH (Armv8.8) permits a PMU counter to increment only on
>>>> +events whose count meets a specified threshold condition. For example if
>>>> +threshold_compare is set to 2 ('Greater than or equal'), and the
>>>> +threshold is set to 2, then the PMU counter will now only increment by
>>>> +when an event would have previously incremented the PMU counter by 2 or
>>>> +more on a single processor cycle.
>>>> +
>>>> +To increment by 1 after passing the threshold condition instead of the
>>>> +number of events on that cycle, add the 'threshold_count' option to the
>>>> +commandline.
>>>> +
>>>> +How-to
>>>> +------
>>>> +
>>>> +The threshold, threshold_compare and threshold_count values can be
>>>> +provided per event:
>>>> +
>>>> +.. code-block:: sh
>>>> +
>>>> +  perf stat -e stall_slot/threshold=2,threshold_compare=2/ \
>>>> +            -e dtlb_walk/threshold=10,threshold_compare=3,threshold_count/
>>> Can you please explain this a bit more?
>>>
>>> I guess the first event counts stall_slot PMU if the event if it's
>>> greater than or equal to 2.  And as threshold_count is not set,
>>> it'd count the stall_slot as is.  E.g. it counts 3 when it sees 3.
>>
>> Hence without 'threshold_count' being set, the other two config requests
>> will not have an effect, is that correct ?
> 
> Yeah I can mention this. It's implied because 0 is the default value of
> config fields, and 0 is a valid value for compare and count field, so
> threshold=0 has to be the way to disable it. But I can mention it
> explicitly.
> 

To avoid any confusion, I thought you meant threshold here instead of
threshold_count. But I replied in more detail about the same issue on
patch 2.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ