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Message-Id: <20231125123529.55686-6-tudor.ambarus@linaro.org>
Date: Sat, 25 Nov 2023 14:35:29 +0200
From: Tudor Ambarus <tudor.ambarus@...aro.org>
To: pratyush@...nel.org, michael@...le.cc, fastevam@...x.de
Cc: linux-mtd@...ts.infradead.org, takahiro.kuwano@...ineon.com,
bacem.daassi@...ineon.com, linux-kernel@...r.kernel.org,
Fabio Estevam <festevam@...x.de>,
Tudor Ambarus <tudor.ambarus@...aro.org>
Subject: [PATCH v3 5/5] mtd: spi-nor: micron-st: Add support for mt25qu01g
From: Fabio Estevam <festevam@...x.de>
Add support for the MT25QU01G 128MB Micron Serial NOR Flash Memory
model.
Link: https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/mt25q/die-rev-b/mt25q_qlkt_u_01g_bbb_0.pdf
Signed-off-by: Fabio Estevam <festevam@...x.de>
[ta: introduce die erase]
Signed-off-by: Tudor Ambarus <tudor.ambarus@...aro.org>
---
drivers/mtd/spi-nor/micron-st.c | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-st.c
index b63f1e9b97d0..3c6499fdb712 100644
--- a/drivers/mtd/spi-nor/micron-st.c
+++ b/drivers/mtd/spi-nor/micron-st.c
@@ -209,10 +209,30 @@ static int st_nor_four_die_late_init(struct spi_nor *nor)
return spi_nor_set_4byte_addr_mode(nor, true);
}
+static int st_nor_two_die_late_init(struct spi_nor *nor)
+{
+ struct spi_nor_flash_parameter *params = nor->params;
+
+ params->die_erase_opcode = SPINOR_OP_MT_DIE_ERASE;
+ params->n_dice = 2;
+
+ /*
+ * Unfortunately the die erase opcode does not have a 4-byte opcode
+ * correspondent for these flashes. The SFDP 4BAIT table fails to
+ * consider the die erase too. We're forced to enter in the 4 byte
+ * address mode in order to benefit of the die erase.
+ */
+ return spi_nor_set_4byte_addr_mode(nor, true);
+}
+
static struct spi_nor_fixups n25q00_fixups = {
.late_init = st_nor_four_die_late_init,
};
+static struct spi_nor_fixups mt25q01_fixups = {
+ .late_init = st_nor_two_die_late_init,
+};
+
static struct spi_nor_fixups mt25q02_fixups = {
.late_init = st_nor_four_die_late_init,
};
@@ -455,6 +475,11 @@ static const struct flash_info st_nor_parts[] = {
SPI_NOR_BP3_SR_BIT6,
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
.mfr_flags = USE_FSR,
+ }, {
+ .id = SNOR_ID(0x20, 0xbb, 0x21, 0x10, 0x44, 0x00),
+ .name = "mt25qu01g",
+ .mfr_flags = USE_FSR,
+ .fixups = &mt25q01_fixups,
}, {
.id = SNOR_ID(0x20, 0xbb, 0x21),
.name = "n25q00a",
--
2.34.1
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