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Message-ID: <98f4cffd-0094-48c4-b899-937e555693fb@linaro.org>
Date: Mon, 27 Nov 2023 08:09:39 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Chen Wang <unicornxw@...il.com>, aou@...s.berkeley.edu,
chao.wei@...hgo.com, conor@...nel.org,
krzysztof.kozlowski+dt@...aro.org, mturquette@...libre.com,
palmer@...belt.com, paul.walmsley@...ive.com,
richardcochran@...il.com, robh+dt@...nel.org, sboyd@...nel.org,
devicetree@...r.kernel.org, linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
haijiao.liu@...hgo.com, xiaoguang.xing@...hgo.com,
guoren@...nel.org, jszhang@...nel.org, inochiama@...look.com,
samuel.holland@...ive.com
Cc: Chen Wang <unicorn_wang@...look.com>
Subject: Re: [PATCH v2 2/4] dt-bindings: soc: sophgo: Add Sophgo syscon module
On 27/11/2023 01:58, Chen Wang wrote:
> From: Chen Wang <unicorn_wang@...look.com>
>
> Add documentation to describe Sophgo System Controller Registers for
> SG2042.
>
> Signed-off-by: Chen Wang <unicorn_wang@...look.com>
> ---
> .../soc/sophgo/sophgo,sg2042-syscon.yaml | 58 +++++++++++++++++++
> 1 file changed, 58 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2042-syscon.yaml
>
> diff --git a/Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2042-syscon.yaml b/Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2042-syscon.yaml
> new file mode 100644
> index 000000000000..329d645091b4
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2042-syscon.yaml
> @@ -0,0 +1,58 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/soc/sophgo/sophgo,sg2042-syscon.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Sophgo SG2042 SoC system controller
> +
> +maintainers:
> + - Chen Wang <unicorn_wang@...look.com>
> +
> +description:
> + The Sophgo SG2042 SoC system controller provides register information such
> + as offset, mask and shift to configure some modules, such as clocks, reset
> + signals and pinctrl.
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - sophgo,sg2042-syscon
> + - const: syscon
> +
> + reg:
> + maxItems: 1
> +
> + clock-controller:
> + # Child node
> + type: object
> + $ref: ../../clock/sophgo/sophgo,sg2042-clkgen.yaml
Use full path, so /schemas/clock/
(look at other bindings how they do it)
> + description:
> + Clock controller for the SoC clocks. This child node definition
> + should follow the bindings specified in
> + Documentation/devicetree/bindings/clock/sophgo/sophgo,sg2042-clkgen.yaml
Drop description.
> +
> +required:
> + - compatible
> + - reg
clock-controller, no?
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + syscon@...10000 {
> + compatible = "sophgo,sg2042-syscon", "syscon";
> + reg = <0x30010000 0x1000>;
> + };
> +
> + syscon@...20000 {
> + compatible = "sophgo,sg2042-syscon", "syscon";
Wait, these are two different devices. Why do you use the same
compatible for them? Is their register layout exactly the same?
Best regards,
Krzysztof
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