[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <1dd87851-25d3-4f85-99ca-5c072675efec@linaro.org>
Date: Mon, 27 Nov 2023 09:09:27 +0100
From: Neil Armstrong <neil.armstrong@...aro.org>
To: Arseniy Krasnov <avkrasnov@...utedevices.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Kevin Hilman <khilman@...libre.com>,
Jerome Brunet <jbrunet@...libre.com>,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>
Cc: oxffffaa@...il.com, kernel@...rdevices.ru,
Liang Yang <liang.yang@...ogic.com>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-amlogic@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] arm64: dts: amlogic: meson-axg: pinctrl node for NAND
On 09/11/2023 10:45, Arseniy Krasnov wrote:
> Add pinctrl node for the Meson NAND controller.
>
> Signed-off-by: Arseniy Krasnov <avkrasnov@...utedevices.com>
> ---
> Changelog:
> v1 -> v2:
> * Rename node name 'nand_all_pins' -> 'nand-all-pins'.
>
> arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 23 ++++++++++++++++++++++
> 1 file changed, 23 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> index a49aa62e3f9f..7e5ac9db93f8 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> @@ -432,6 +432,27 @@ mux-1 {
> };
> };
>
> + nand_all_pins: nand-all-pins {
> + mux {
> + groups = "emmc_nand_d0",
> + "emmc_nand_d1",
> + "emmc_nand_d2",
> + "emmc_nand_d3",
> + "emmc_nand_d4",
> + "emmc_nand_d5",
> + "emmc_nand_d6",
> + "emmc_nand_d7",
> + "nand_ce0",
> + "nand_ale",
> + "nand_cle",
> + "nand_wen_clk",
> + "nand_ren_wr";
> + function = "nand";
> + input-enable;
> + bias-pull-up;
> + };
> + };
> +
> emmc_ds_pins: emmc_ds {
> mux {
> groups = "emmc_ds";
> @@ -1913,6 +1934,8 @@ nfc: nand-controller@...0 {
> reg = <0x0 0x7800 0x0 0x100>,
> <0x0 0x7000 0x0 0x800>;
> reg-names = "nfc", "emmc";
> + pinctrl-0 = <&nand_all_pins>;
> + pinctrl-names = "default";
> #address-cells = <1>;
> #size-cells = <0>;
> interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
Reviewed-by: Neil Armstrong <neil.armstrong@...aro.org>
Powered by blists - more mailing lists