[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20231127013602.253835-2-jeeheng.sia@starfivetech.com>
Date: Mon, 27 Nov 2023 09:35:56 +0800
From: Sia Jee Heng <jeeheng.sia@...rfivetech.com>
To: <paul.walmsley@...ive.com>, <palmer@...belt.com>,
<aou@...s.berkeley.edu>, <conor@...nel.org>, <kernel@...il.dk>,
<robh+dt@...nel.org>, <emil.renner.berthing@...onical.com>
CC: <linux-riscv@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
<jeeheng.sia@...rfivetech.com>, <leyfoon.tan@...rfivetech.com>
Subject: [PATCH 1/7] dt-bindings: riscv: Add StarFive Dubhe compatibles
Dubhe-80 and Dubhe-90 are RISC-V cpu core from StarFive Technology.
Signed-off-by: Sia Jee Heng <jeeheng.sia@...rfivetech.com>
Reviewed-by: Ley Foon Tan <leyfoon.tan@...rfivetech.com>
---
Documentation/devicetree/bindings/riscv/cpus.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml
index f392e367d673..493972b29a22 100644
--- a/Documentation/devicetree/bindings/riscv/cpus.yaml
+++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
@@ -48,6 +48,8 @@ properties:
- thead,c906
- thead,c910
- thead,c920
+ - starfive,dubhe-80
+ - starfive,dubhe-90
- const: riscv
- items:
- enum:
--
2.34.1
Powered by blists - more mailing lists