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Message-ID: <20231127-swell-garnish-3f2104647aa0@wendy>
Date: Mon, 27 Nov 2023 10:39:16 +0000
From: Conor Dooley <conor.dooley@...rochip.com>
To: Jisheng Zhang <jszhang@...nel.org>
CC: Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
<linux-riscv@...ts.infradead.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] riscv: Use asm-generic for {read,write}{bwlq} and their
relaxed variant
On Thu, Nov 23, 2023 at 10:20:03PM +0800, Jisheng Zhang wrote:
> The asm-generic implementation is functionally identical to the riscv
> version.
>
> Signed-off-by: Jisheng Zhang <jszhang@...nel.org>
This fails to build for nommu:
/tmp/tmp.ojumpiEgOt/arch/riscv/include/asm/timex.h:20:16: error: implicit declaration of function 'readq_relaxed' [-Werror=implicit-function-declaration]
/tmp/tmp.ojumpiEgOt/include/asm-generic/io.h:342:23: error: conflicting types for 'readq_relaxed'; have 'u64(const volatile void *)' {aka 'long long unsigned int(const volatile void *)'}
Cheers,
Conor.
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