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Message-ID: <addebe1d-c08a-434e-9146-b6c10418a9d2@amd.com>
Date: Tue, 28 Nov 2023 10:32:08 -0500
From: Yazen Ghannam <yazen.ghannam@....com>
To: Tony Luck <tony.luck@...el.com>, Borislav Petkov <bp@...en8.de>
Cc: yazen.ghannam@....com, Smita.KoralahalliChannabasappa@....com,
dave.hansen@...ux.intel.com, x86@...nel.org,
linux-edac@...r.kernel.org, linux-kernel@...r.kernel.org,
patches@...ts.linux.dev
Subject: Re: [PATCH v9 2/3] x86/mce: Add per-bank CMCI storm mitigation
On 11/27/2023 7:42 PM, Tony Luck wrote:
> On Mon, Nov 27, 2023 at 12:14:28PM -0800, Tony Luck wrote:
>> On Mon, Nov 27, 2023 at 11:50:26AM -0800, Tony Luck wrote:
>>> On Tue, Nov 21, 2023 at 12:54:48PM +0100, Borislav Petkov wrote:
>>>> On Tue, Nov 14, 2023 at 02:04:46PM -0800, Tony Luck wrote:
>>> But it isn't doing the same thing. The timer calls:
>>>
>>> machine_check_poll(0, this_cpu_ptr(&mce_poll_banks));
>>>
>>> and cmci_mc_poll_banks() calls:
>>>
>>> machine_check_poll(0, this_cpu_ptr(&mce_poll_banks));
>
> machine_check_poll(0, this_cpu_ptr(&mce_banks_owned));
>
>>
>> Bah ... I've cut & pasted the same thing ... but I think there
>> are separate bit maps ... maybe I'm wrong. Will go back and
>> look again.
>>
This mutually exclusive behavior is not enforced on AMD systems. A bank
can be polled and signaled using hardware interrupts.
I've been thinking to change this in order to save polling cycles. Now
it seems there's another reason. :)
Thanks,
Yazen
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