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Message-ID: <SN6PR02MB41573431683896536879EF40D4BCA@SN6PR02MB4157.namprd02.prod.outlook.com>
Date:   Tue, 28 Nov 2023 17:34:38 +0000
From:   Michael Kelley <mhklinux@...look.com>
To:     "Edgecombe, Rick P" <rick.p.edgecombe@...el.com>,
        "linux-hyperv@...r.kernel.org" <linux-hyperv@...r.kernel.org>,
        "ardb@...nel.org" <ardb@...nel.org>,
        "hch@...radead.org" <hch@...radead.org>,
        "Lutomirski, Andy" <luto@...nel.org>,
        "linux-coco@...ts.linux.dev" <linux-coco@...ts.linux.dev>,
        "dave.hansen@...ux.intel.com" <dave.hansen@...ux.intel.com>,
        "thomas.lendacky@....com" <thomas.lendacky@....com>,
        "haiyangz@...rosoft.com" <haiyangz@...rosoft.com>,
        "akpm@...ux-foundation.org" <akpm@...ux-foundation.org>,
        "kirill.shutemov@...ux.intel.com" <kirill.shutemov@...ux.intel.com>,
        "mingo@...hat.com" <mingo@...hat.com>,
        "seanjc@...gle.com" <seanjc@...gle.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "kys@...rosoft.com" <kys@...rosoft.com>,
        "Cui, Dexuan" <decui@...rosoft.com>,
        "linux-mm@...ck.org" <linux-mm@...ck.org>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "urezki@...il.com" <urezki@...il.com>,
        "hpa@...or.com" <hpa@...or.com>,
        "peterz@...radead.org" <peterz@...radead.org>,
        "wei.liu@...nel.org" <wei.liu@...nel.org>,
        "bp@...en8.de" <bp@...en8.de>, "Rodel, Jorg" <jroedel@...e.de>,
        "sathyanarayanan.kuppuswamy@...ux.intel.com" 
        <sathyanarayanan.kuppuswamy@...ux.intel.com>,
        "lstoakes@...il.com" <lstoakes@...il.com>,
        "x86@...nel.org" <x86@...nel.org>
Subject: RE: [PATCH v2 2/8] x86/mm: Don't do a TLB flush if changing a PTE
 that isn't marked present

From: Edgecombe, Rick P <rick.p.edgecombe@...el.com> Sent: Monday, November 27, 2023 2:21 PM
> 
> On Tue, 2023-11-21 at 13:20 -0800, mhkelley58@...il.com wrote:
> > --- a/arch/x86/mm/pat/set_memory.c
> > +++ b/arch/x86/mm/pat/set_memory.c
> > @@ -1636,7 +1636,10 @@ static int __change_page_attr(struct cpa_data
> > *cpa, int primary)
> >                  */
> >                 if (pte_val(old_pte) != pte_val(new_pte)) {
> >                         set_pte_atomic(kpte, new_pte);
> > -                       cpa->flags |= CPA_FLUSHTLB;
> > +
> > +                       /* If old_pte isn't present, it's not in the TLB */
> > +                       if (pte_present(old_pte))
> > +                               cpa->flags |= CPA_FLUSHTLB;
> >                 }
> >                 cpa->numpages = 1;
> >                 return 0;
> >
> 
> Makes sense to me. The PMD case can be handled similarly in
> __should_split_large_page().

OK, I'll look at that case.

> 
> I also think it should be more robust in regards to the cache flushing
> changes.
> 
> If callers did:
> set_memory_np()
> set_memory_uc()
> set_memory_p()
> 
> Then the cache flush would be missed.  I don't think anyone is, but we
> shouldn't introduce hidden things like that. Maybe fix it like this:
> 
> diff --git a/arch/x86/mm/pat/set_memory.c
> b/arch/x86/mm/pat/set_memory.c
> index f519e5ca543b..28ff53a4447a 100644
> --- a/arch/x86/mm/pat/set_memory.c
> +++ b/arch/x86/mm/pat/set_memory.c
> @@ -1856,11 +1856,6 @@ static int change_page_attr_set_clr(unsigned
> long *addr, int numpages,
> 
>         ret = __change_page_attr_set_clr(&cpa, 1);
> 
> -       /*
> -        * Check whether we really changed something:
> -        */
> -       if (!(cpa.flags & CPA_FLUSHTLB))
> -               goto out;
> 
>         /*
>          * No need to flush, when we did not set any of the caching
> @@ -1868,6 +1863,12 @@ static int change_page_attr_set_clr(unsigned
> long *addr, int numpages,
>          */
>         cache = !!pgprot2cachemode(mask_set);
> 
> +       /*
> +        * Check whether we really changed something:
> +        */
> +       if (!(cpa.flags & CPA_FLUSHTLB) && !cache)
> +               goto out;
> +
>         /*
>          * On error; flush everything to be sure.
>          */
> 
> Hmm, might want to maintain the "On error; flush everything to be sure"
> logic in the NP->P case as well.

OK, I see your point.  I had not realized that CPA_FLUSHTLB really
has a meaning beyond just indicating that the TLB needs to be
flushed.  It really means "something has changed" in a PTE.  I'll
incorporate your suggestion.

Michael

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