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Message-ID: <20231128034517.GE1463@sol.localdomain>
Date: Mon, 27 Nov 2023 19:45:17 -0800
From: Eric Biggers <ebiggers@...nel.org>
To: Jerry Shih <jerry.shih@...ive.com>
Cc: paul.walmsley@...ive.com, palmer@...belt.com,
aou@...s.berkeley.edu, herbert@...dor.apana.org.au,
davem@...emloft.net, conor.dooley@...rochip.com, ardb@...nel.org,
heiko@...ech.de, phoebe.chen@...ive.com, hongrong.hsu@...ive.com,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-crypto@...r.kernel.org
Subject: Re: [PATCH v2 01/13] RISC-V: add helper function to read the vector
VLEN
On Mon, Nov 27, 2023 at 03:06:51PM +0800, Jerry Shih wrote:
> From: Heiko Stuebner <heiko.stuebner@...ll.eu>
>
> VLEN describes the length of each vector register and some instructions
> need specific minimal VLENs to work correctly.
>
> The vector code already includes a variable riscv_v_vsize that contains
> the value of "32 vector registers with vlenb length" that gets filled
> during boot. vlenb is the value contained in the CSR_VLENB register and
> the value represents "VLEN / 8".
>
> So add riscv_vector_vlen() to return the actual VLEN value for in-kernel
> users when they need to check the available VLEN.
>
> Signed-off-by: Heiko Stuebner <heiko.stuebner@...ll.eu>
> Signed-off-by: Jerry Shih <jerry.shih@...ive.com>
> ---
> arch/riscv/include/asm/vector.h | 11 +++++++++++
> 1 file changed, 11 insertions(+)
Reviewed-by: Eric Biggers <ebiggers@...gle.com>
- Eric
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