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Message-ID: <9c4c1fe7-5d71-4bb2-8b92-f4e9a136e93d@quicinc.com>
Date: Tue, 28 Nov 2023 15:16:45 +0800
From: Jie Luo <quic_luoj@...cinc.com>
To: Andrew Lunn <andrew@...n.ch>
CC: <davem@...emloft.net>, <edumazet@...gle.com>, <kuba@...nel.org>,
<pabeni@...hat.com>, <robh+dt@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>, <conor+dt@...nel.org>,
<hkallweit1@...il.com>, <linux@...linux.org.uk>, <corbet@....net>,
<netdev@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <linux-doc@...r.kernel.org>
Subject: Re: [PATCH v6 3/6] net: phy: at803x: add QCA8084 ethernet phy support
On 11/27/2023 9:22 PM, Andrew Lunn wrote:
> On Mon, Nov 27, 2023 at 02:21:46PM +0800, Jie Luo wrote:
>>
>>
>> On 11/27/2023 1:31 AM, Andrew Lunn wrote:
>>>> + /* There are two PCSs available for QCA8084, which support the
>>>> + * following interface modes.
>>>> + *
>>>> + * 1. PHY_INTERFACE_MODE_10G_QXGMII utilizes PCS1 for all
>>>> + * available 4 ports, which is for all link speeds.
>>>> + *
>>>> + * 2. PHY_INTERFACE_MODE_2500BASEX utilizes PCS0 for the
>>>> + * fourth port, which is only for the link speed 2500M same
>>>> + * as QCA8081.
>>>> + *
>>>> + * 3. PHY_INTERFACE_MODE_SGMII utilizes PCS0 for the fourth
>>>> + * port, which is for the link speed 10M, 100M and 1000M same
>>>> + * as QCA8081.
>>>> + */
>>>
>>> How are these 3 modes configured? I don't see any software
>>> configuration of this in these drivers. Can it only by configured by
>>> strapping?
>>
>> The interface mode is passed in the .config_init, which is configured
>> by the PCS driver, the hardware register is located in the PCS, this
>> driver will be pushed later.
>
> Is this the same as how the syqca807x works? Can the PCS driver be
> shared by these two drivers?
I am not sure syqca807x, would you point me the code path of this driver?
>
> What i don't like at the moment is that we have two driver
> developments going on at once for hardware which seems very similar,
> but no apparent cooperation?
>
> Andrew
The PCS of qca8084 is the PHY PCS, which should be new PCS driver,
in the previous chips, we don't have this kind of PHY PCS.
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