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Message-ID: <246979fa097245cf1626bbc2d83147a5367219e7.camel@intel.com>
Date: Tue, 28 Nov 2023 01:34:11 +0000
From: "Edgecombe, Rick P" <rick.p.edgecombe@...el.com>
To: "kvm@...r.kernel.org" <kvm@...r.kernel.org>,
"Yang, Weijiang" <weijiang.yang@...el.com>,
"pbonzini@...hat.com" <pbonzini@...hat.com>,
"seanjc@...gle.com" <seanjc@...gle.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"Hansen, Dave" <dave.hansen@...el.com>
CC: "john.allen@....com" <john.allen@....com>,
"peterz@...radead.org" <peterz@...radead.org>,
"Gao, Chao" <chao.gao@...el.com>,
"mlevitsk@...hat.com" <mlevitsk@...hat.com>
Subject: Re: [PATCH v7 03/26] x86/fpu/xstate: Add CET supervisor mode state
support
On Fri, 2023-11-24 at 00:53 -0500, Yang Weijiang wrote:
> Add supervisor mode state support within FPU xstate management
> framework.
> Although supervisor shadow stack is not enabled/used today in
> kernel,KVM
> requires the support because when KVM advertises shadow stack feature
> to
> guest, architecturally it claims the support for both user and
> supervisor
> modes for guest OSes(Linux or non-Linux).
>
> CET supervisor states not only includes PL{0,1,2}_SSP but also
> IA32_S_CET
> MSR, but the latter is not xsave-managed. In virtualization world,
> guest
> IA32_S_CET is saved/stored into/from VM control structure. With
> supervisor
> xstate support, guest supervisor mode shadow stack state can be
> properly
> saved/restored when 1) guest/host FPU context is swapped 2) vCPU
> thread is sched out/in.
>
> The alternative is to enable it in KVM domain, but KVM maintainers
> NAKed
> the solution. The external discussion can be found at [*], it ended
> up
> with adding the support in kernel instead of KVM domain.
>
> Note, in KVM case, guest CET supervisor state i.e.,
> IA32_PL{0,1,2}_MSRs,
> are preserved after VM-Exit until host/guest fpstates are swapped,
> but
> since host supervisor shadow stack is disabled, the preserved MSRs
> won't
> hurt host.
>
> [*]:
> https://lore.kernel.org/all/806e26c2-8d21-9cc9-a0b7-7787dd231729@intel.com/
>
> Signed-off-by: Yang Weijiang <weijiang.yang@...el.com>
Reviewed-by: Rick Edgecombe <rick.p.edgecombe@...el.com>
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