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Message-ID: <CAPLW+4=QQR_u0Fi2L0orQFTd-_UpYZAQ94Je772Vs-2WKZGuiA@mail.gmail.com>
Date: Wed, 29 Nov 2023 12:48:56 -0600
From: Sam Protsenko <semen.protsenko@...aro.org>
To: Youngmin Nam <youngmin.nam@...sung.com>,
krzysztof.kozlowski@...aro.org
Cc: tomasz.figa@...il.com, s.nawrocki@...sung.com,
alim.akhtar@...sung.com, linus.walleij@...aro.org,
linux-arm-kernel@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org, linux-gpio@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] pinctrl: samsung: add irq_set_affinity() for non wake
up external gpio interrupt
On Wed, Nov 29, 2023 at 12:32 AM Youngmin Nam <youngmin.nam@...sung.com> wrote:
> > I tried to test this patch on E850-96, and an attempt to write into
> > smp_affinity (for some GPIO irq) also fails for me:
> >
> > # echo f0 > smp_affinity
> > -bash: echo: write error: Input/output error
> >
> > When I add some pr_err() to exynos_irq_set_affinity(), I can't see
> > those printed in dmesg. So I guess exynos_irq_set_affinity() doesn't
> > get called at all. So the error probably happens before
> > .irq_set_affinity callback gets called.
> >
> > Youngmin, can you please try and test this patch on E850-96? This
> > board is already supported in upstream kernel. For example you can use
> > "Volume Up" interrupt for the test, which is GPIO irq.
> >
>
> I intened this affinity setting would work only on *Non* Wakeup External Interrupt.
> The "Volume Up" on E850-96 board is connected with "gpa0-7" and
> that is Wakeup External interrupt so that we can't test the callback.
>
Oh no. It was really silly mistake on my part :) But please check my
answer below for good news.
> I couldn't find out a pin for the test on E850-96 board yet.
> We can test if there is a usage of *Non" Wake up External Interrupt of GPIO
> on E850-96 board.
>
> Do you have any idea ?
>
Yep, just managed to successfully test your patch on E850-96. My
testing procedure below might appear messy, but I didn't want to do
any extra soldering :)
Used GPG1[0] pin for testing. As you can see from schematics [1],
GPG1[0] is connected to R196 resistor (which is not installed on the
board).
I've modified E850-96 dts file like this:
8<---------------------------------------------------------------------------->8
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
- pinctrl-0 = <&key_voldown_pins &key_volup_pins>;
+ pinctrl-0 = <&key_voldown_pins &key_volup_pins &key_test_pins>;
...
+ test-key {
+ label = "Test Key";
+ linux,code = <KEY_RIGHTCTRL>;
+ gpios = <&gpg1 0 GPIO_ACTIVE_LOW>;
+ };
};
...
+&pinctrl_peri {
+ key_test_pins: key-test-pins {
+ samsung,pins = "gpg1-0";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_EINT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
+ };
+};
8<---------------------------------------------------------------------------->8
It appeared in /proc/interrupts as follows:
87: 2 0 0 0 0
0 0 0 gpg1 0 Edge Test Key
Then I touched R196 resistor pads with my finger (emulating key press)
and looked again at /proc/interrupts:
87: 444 0 0 0 0
0 0 0 gpg1 0 Edge Test Key
Then I reconfigured smp_affinity like so:
# cat /proc/irq/87/smp_affinity
ff
# echo f0 > /proc/irq/87/smp_affinity
# cat /proc/irq/87/smp_affinity
f0
Then I messed with R196 resistor pads with my finger again, and
re-checked /proc/interrupts:
CPU0 CPU1 CPU2 CPU3 CPU4
CPU5 CPU6 CPU7
87: 444 0 0 0 234
0 0 0 gpg1 0 Edge Test Key
And without this patch that procedure above of course doesn't work.
So as far as I'm concerned, feel free to add:
Tested-by: Sam Protsenko <semen.protsenko@...aro.org>
[1] https://www.96boards.org/documentation/consumer/e850-96b/hardware-docs/files/e850-96b-schematics.pdf
Thanks!
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