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Message-ID: <20231129060043.368874-3-jeeheng.sia@starfivetech.com>
Date: Wed, 29 Nov 2023 14:00:39 +0800
From: Sia Jee Heng <jeeheng.sia@...rfivetech.com>
To: <kernel@...il.dk>, <robh+dt@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>, <krzk@...nel.org>,
<conor+dt@...nel.org>, <paul.walmsley@...ive.com>,
<palmer@...belt.com>, <aou@...s.berkeley.edu>,
<daniel.lezcano@...aro.org>, <tglx@...utronix.de>,
<conor@...nel.org>, <anup@...infault.org>,
<gregkh@...uxfoundation.org>, <jirislaby@...nel.org>,
<michal.simek@....com>, <michael.zhu@...rfivetech.com>,
<drew@...gleboard.org>
CC: <devicetree@...r.kernel.org>, <linux-riscv@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <jeeheng.sia@...rfivetech.com>,
<leyfoon.tan@...rfivetech.com>
Subject: [PATCH v2 2/6] dt-bindings: riscv: Add StarFive JH8100 SoC
Add device tree bindings for the StarFive JH8100 RISC-V SoC.
Signed-off-by: Sia Jee Heng <jeeheng.sia@...rfivetech.com>
Reviewed-by: Ley Foon Tan <leyfoon.tan@...rfivetech.com>
---
Documentation/devicetree/bindings/riscv/starfive.yaml | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/riscv/starfive.yaml b/Documentation/devicetree/bindings/riscv/starfive.yaml
index cc4d92f0a1bf..7e2da9eef3db 100644
--- a/Documentation/devicetree/bindings/riscv/starfive.yaml
+++ b/Documentation/devicetree/bindings/riscv/starfive.yaml
@@ -29,7 +29,10 @@ properties:
- starfive,visionfive-2-v1.2a
- starfive,visionfive-2-v1.3b
- const: starfive,jh7110
-
+ - items:
+ - enum:
+ - starfive,jh8100-evb
+ - const: starfive,jh8100
additionalProperties: true
...
--
2.34.1
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