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Message-ID: <7df38308-872b-4bae-9fb0-5075611290d9@quicinc.com>
Date: Wed, 29 Nov 2023 11:44:38 +0530
From: Bibek Kumar Patro <quic_bibekkum@...cinc.com>
To: Konrad Dybcio <konrad.dybcio@...aro.org>, <will@...nel.org>,
<robin.murphy@....com>, <joro@...tes.org>,
<dmitry.baryshkov@...aro.org>, <a39.skl@...il.com>,
<quic_bjorande@...cinc.com>, <mani@...nel.org>,
<quic_eberman@...cinc.com>, <robdclark@...omium.org>,
<u.kleine-koenig@...gutronix.de>, <robh@...nel.org>,
<vladimir.oltean@....com>, <quic_pkondeti@...cinc.com>,
<quic_molvera@...cinc.com>
CC: <linux-arm-msm@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>, <iommu@...ts.linux.dev>,
<linux-kernel@...r.kernel.org>, <qipl.kernel.upstream@...cinc.com>
Subject: Re: [PATCH v3 3/4] iommu/arm-smmu: add ACTLR data and support for
SC7280
On 11/27/2023 9:05 PM, Konrad Dybcio wrote:
> On 27.11.2023 15:54, Bibek Kumar Patro wrote:
>> Add ACTLR data table for SC7280 along with support for
>> same including SC7280 specific implementation operations.
>>
>> Signed-off-by: Bibek Kumar Patro <quic_bibekkum@...cinc.com>
>> ---
>> drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 25 +++++++++++++++++++++-
>> 1 file changed, 24 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
>> index 247eaa194129..f0ad09f9a974 100644
>> --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
>> +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
>> @@ -27,6 +27,20 @@ struct actlr_config {
>> #define CPRE BIT(1) /* Enable context caching in the prefetch buffer */
>> #define CMTLB BIT(0) /* Enable context caching in the macro TLB */
>>
>> +static const struct actlr_config sc7280_apps_actlr_cfg[] = {
>> + { 0x0800, 0x24E1, PREFETCH_DISABLE | CMTLB },
> hex should be lowercase
Noted,thanks for pointing this out will take care of this in next
version.
>
>> + { 0x2000, 0x0163, PREFETCH_DISABLE | CMTLB },
>> + { 0x2080, 0x0461, PREFETCH_DISABLE | CMTLB },
>> + { 0x2100, 0x0161, PREFETCH_DISABLE | CMTLB },
>> + { 0x0900, 0x0407, PREFETCH_SHALLOW | CPRE | CMTLB },
>> + { 0x2180, 0x0027, PREFETCH_SHALLOW | CPRE | CMTLB },
>> + { 0x1000, 0x07ff, PREFETCH_DEEP | CPRE | CMTLB },
>> +};
> Any reason this list is so much smaller than 8550's? Is it complete?
Yes it's complete only. This list varies targetwise actually so we just
fill it referring the hardware settings reference document. So size of
the list might vary as per target.
>
> Konrad
Thanks & regards,
Bibek
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