linux-kernel - Re: [PATCH v2 3/4] arm64: dts: nuvoton: Add pinctrl support for ma35d1

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <9ec2dd42-5173-40df-8e6b-9c09f2d77f67@linaro.org>
Date:   Wed, 29 Nov 2023 11:02:35 +0100
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Jacky Huang <ychuang570808@...il.com>, linus.walleij@...aro.org,
        robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        conor+dt@...nel.org, p.zabel@...gutronix.de, j.neuschaefer@....net
Cc:     linux-arm-kernel@...ts.infradead.org, linux-gpio@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        ychuang3@...oton.com, schung@...oton.com
Subject: Re: [PATCH v2 3/4] arm64: dts: nuvoton: Add pinctrl support for
 ma35d1

On 29/11/2023 10:41, Jacky Huang wrote:
> 
> Dear Krzysztof,
> 
> 
> On 2023/11/29 下午 04:11, Krzysztof Kozlowski wrote:
>> On 29/11/2023 04:35, Jacky Huang wrote:
>>>>>> Best regards,
>>>>>> Krzysztof
>>>>>>
>>>>> Yes, it did pass the 'dtbs_check'. I guess the tool does not detect such
>>>>> issues.
>>>>> Anyway, I will fix it in the next version.
>>>> Hm, I see your bindings indeed allow pin-.* and unit addresses, so it is
>>>> the binding issue.
>>>>
>>>> The examples you used as reference - xlnx,zynqmp-pinctrl.yaml and
>>>> realtek,rtd1315e-pinctrl.yaml - do not mix these as you do.
>>>>
>>>> I don't understand why do you need them yet. I don't see any populate of
>>>> children. There are no compatibles, either.
>>>>
>>>> Which part of your driver uses them exactly?
>>>>
>>>> Best regards,
>>>> Krzysztof
>>>>
>>> I will move the 'pcfg_default: pin-default' from dtsi to dts, like this:
>>>
>>> &pinctrl {
>>>       pcfg_default: pin-default {
>>>           slew-rate = <0>;
>>>           input-schmitt-disable;
>>>           bias-disable;
>>>           power-source = <1>;
>>>           drive-strength = <17100>;
>>>       };
>> This solves nothing. It's the same placement.
>>
>>
>> Best regards,
>> Krzysztof
>>
> 
> OK, it stil be the binding issues.
> For "^pin-[a-z0-9]+$", I reference to the "pcfg-[a-z0-9-]+$" of 
> rockchip,pinctrl.yaml.
> 
> My intention is to describe a generic pin configuration, aiming to make 
> the pin
> description more concise. In actual testing, it proves to be effective.

Can you instead respond to my actual questions?

Best regards,
Krzysztof