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Message-ID: <170125694797.398.10954406504352412833.tip-bot2@tip-bot2>
Date:   Wed, 29 Nov 2023 11:22:27 -0000
From:   "tip-bot2 for Borislav Petkov (AMD)" <tip-bot2@...utronix.de>
To:     linux-tip-commits@...r.kernel.org
Cc:     "Borislav Petkov (AMD)" <bp@...en8.de>,
        Nikolay Borisov <nik.borisov@...e.com>, x86@...nel.org,
        linux-kernel@...r.kernel.org
Subject: [tip: x86/cpu] x86/CPU/AMD: Get rid of amd_erratum_1054[]

The following commit has been merged into the x86/cpu branch of tip:

Commit-ID:     54c33e23f75d5c9925495231c57d3319336722ef
Gitweb:        https://git.kernel.org/tip/54c33e23f75d5c9925495231c57d3319336722ef
Author:        Borislav Petkov (AMD) <bp@...en8.de>
AuthorDate:    Fri, 03 Nov 2023 19:53:49 +01:00
Committer:     Borislav Petkov (AMD) <bp@...en8.de>
CommitterDate: Wed, 29 Nov 2023 12:12:55 +01:00

x86/CPU/AMD: Get rid of amd_erratum_1054[]

No functional changes.

Signed-off-by: Borislav Petkov (AMD) <bp@...en8.de>
Reviewed-by: Nikolay Borisov <nik.borisov@...e.com>
Link: http://lore.kernel.org/r/20231120104152.13740-10-bp@alien8.de
---
 arch/x86/kernel/cpu/amd.c | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 13ad44b..219ae7e 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -66,10 +66,6 @@ static const int amd_erratum_400[] =
 static const int amd_erratum_383[] =
 	AMD_OSVW_ERRATUM(3, AMD_MODEL_RANGE(0x10, 0, 0, 0xff, 0xf));
 
-/* #1054: Instructions Retired Performance Counter May Be Inaccurate */
-static const int amd_erratum_1054[] =
-	AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0, 0, 0x2f, 0xf));
-
 static const int amd_erratum_1485[] =
 	AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x19, 0x10, 0x0, 0x1f, 0xf),
 			   AMD_MODEL_RANGE(0x19, 0x60, 0x0, 0xaf, 0xf));
@@ -1201,7 +1197,7 @@ static void init_amd(struct cpuinfo_x86 *c)
 	 * Counter May Be Inaccurate".
 	 */
 	if (cpu_has(c, X86_FEATURE_IRPERF) &&
-	    !cpu_has_amd_erratum(c, amd_erratum_1054))
+	    (boot_cpu_has(X86_FEATURE_ZEN) && c->x86_model > 0x2f))
 		msr_set_bit(MSR_K7_HWCR, MSR_K7_HWCR_IRPERF_EN_BIT);
 
 	check_null_seg_clears_base(c);

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