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Message-Id: <20231129120638.33294-1-liuhaoran14@163.com>
Date:   Wed, 29 Nov 2023 04:06:38 -0800
From:   Haoran Liu <liuhaoran14@....com>
To:     vkoul@...nel.org
Cc:     kishon@...nel.org, linux-phy@...ts.infradead.org,
        linux-kernel@...r.kernel.org, Haoran Liu <liuhaoran14@....com>
Subject: [PATCH] [phy/marvell] phy-pxa-28nm-hsic: Add error handling

This patch add error handling for the clk_prepare_enable call
in the mv_hsic_phy_init function. Previously, the
function did not handle potential failure cases of
clk_prepare_enable, which could result in undefined behavior if
the clock preparation failed.

Signed-off-by: Haoran Liu <liuhaoran14@....com>
---
 drivers/phy/marvell/phy-pxa-28nm-hsic.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/phy/marvell/phy-pxa-28nm-hsic.c b/drivers/phy/marvell/phy-pxa-28nm-hsic.c
index eff6dd6b2dd0..1aa09ebeaa8e 100644
--- a/drivers/phy/marvell/phy-pxa-28nm-hsic.c
+++ b/drivers/phy/marvell/phy-pxa-28nm-hsic.c
@@ -60,7 +60,11 @@ static int mv_hsic_phy_init(struct phy *phy)
 	void __iomem *base = mv_phy->base;
 	int ret;
 
-	clk_prepare_enable(mv_phy->clk);
+	ret = clk_prepare_enable(mv_phy->clk);
+	if (ret) {
+		dev_err(&pdev->dev, "Failed to enable clock: %d\n", ret);
+		return ret;
+	}
 
 	/* Set reference clock */
 	writel(0x1 << PHY_28NM_HSIC_PLL_SELLPFR_SHIFT |
-- 
2.17.1

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