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Message-ID: <4d9e1a2d-2e37-a82f-7133-2b28b9c980c2@loongson.cn>
Date: Thu, 30 Nov 2023 18:06:38 +0800
From: maobibo <maobibo@...ngson.cn>
To: Tianrui Zhao <zhaotianrui@...ngson.cn>,
Huacai Chen <chenhuacai@...nel.org>
Cc: WANG Xuerui <kernel@...0n.name>, kvm@...r.kernel.org,
loongarch@...ts.linux.dev, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 0/3] LoongArch: KVM: Remove SW timer switch when vcpu
is halt polling
slightly ping...
On 2023/11/16 上午10:30, Bibo Mao wrote:
> This patches removes SW timer switch during vcpu block stage. VM uses HW
> timer rather than SW PV timer on LoongArch system, it can check pending
> HW timer interrupt status directly, rather than switch to SW timer and
> check injected SW timer interrupt.
>
> When SW timer is not used in vcpu halt-polling mode, the relative
> SW timer handling before entering guest can be removed also. Timer
> emulation is simpler than before, SW timer emuation is only used in vcpu
> thread context switch.
> ---
> Changes in v4:
> If vcpu is scheduled out since there is no pending event, and timer is
> fired during sched-out period. SW hrtimer is used to wake up vcpu thread
> in time, rather than inject pending timer irq.
>
> Changes in v3:
> Add kvm_arch_vcpu_runnable checking before kvm_vcpu_halt.
>
> Changes in v2:
> Add halt polling support for idle instruction emulation, using api
> kvm_vcpu_halt rather than kvm_vcpu_block in function kvm_emu_idle.
>
> ---
> Bibo Mao (3):
> LoongArch: KVM: Remove SW timer switch when vcpu is halt polling
> LoongArch: KVM: Allow to access HW timer CSR registers always
> LoongArch: KVM: Remove kvm_acquire_timer before entering guest
>
> arch/loongarch/include/asm/kvm_vcpu.h | 1 -
> arch/loongarch/kvm/exit.c | 13 +-----
> arch/loongarch/kvm/main.c | 1 -
> arch/loongarch/kvm/timer.c | 62 ++++++++++-----------------
> arch/loongarch/kvm/vcpu.c | 38 ++++------------
> 5 files changed, 32 insertions(+), 83 deletions(-)
>
>
> base-commit: c42d9eeef8e5ba9292eda36fd8e3c11f35ee065c
>
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