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Message-ID: <IA1PR20MB4953A05B9162AA2659DE78A5BB82A@IA1PR20MB4953.namprd20.prod.outlook.com>
Date:   Thu, 30 Nov 2023 20:16:38 +0800
From:   Inochi Amaoto <inochiama@...look.com>
To:     Yu-Chien Peter Lin <peterlin@...estech.com>
Cc:     Inochi Amaoto <inochiama@...look.com>, Guo Ren <guoren@...nel.org>,
        acme@...nel.org, adrian.hunter@...el.com, ajones@...tanamicro.com,
        alexander.shishkin@...ux.intel.com, andre.przywara@....com,
        anup@...infault.org, aou@...s.berkeley.edu, atishp@...shpatra.org,
        conor+dt@...nel.org, conor.dooley@...rochip.com, conor@...nel.org,
        devicetree@...r.kernel.org, dminus@...estech.com,
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        irogers@...gle.com, jernej.skrabec@...il.com, jolsa@...nel.org,
        jszhang@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-perf-users@...r.kernel.org,
        linux-renesas-soc@...r.kernel.org, linux-riscv@...ts.infradead.org,
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Subject: Re: [PATCH v4 09/13] dt-bindings: riscv: Add T-Head PMU extension description

>
>Hi Inochi,
>
>On Thu, Nov 30, 2023 at 04:29:22PM +0800, Inochi Amaoto wrote:
>>>
>>> Hi Guo Ren,
>>>
>>> On Thu, Nov 23, 2023 at 05:14:30AM +0800, Guo Ren wrote:
>>>> On Wed, Nov 22, 2023 at 8:17 PM Yu Chien Peter Lin
>>>> <peterlin@...estech.com> wrote:
>>>>>
>>>>> Document the ISA string for T-Head performance monitor extension
>>>>> which provides counter overflow interrupt mechanism.
>>>>>
>>>>> Signed-off-by: Yu Chien Peter Lin <peterlin@...estech.com>
>>>>> ---
>>>>> Changes v2 -> v3:
>>>>>   - New patch
>>>>> Changes v3 -> v4:
>>>>>   - No change
>>>>> ---
>>>>>  Documentation/devicetree/bindings/riscv/extensions.yaml | 6 ++++++
>>>>>  1 file changed, 6 insertions(+)
>>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
>>>>> index c91ab0e46648..694efaea8fce 100644
>>>>> --- a/Documentation/devicetree/bindings/riscv/extensions.yaml
>>>>> +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
>>>>> @@ -258,5 +258,11 @@ properties:
>>>>>              in commit 2e5236 ("Ztso is now ratified.") of the
>>>>>              riscv-isa-manual.
>>>>>
>>>>> +        - const: xtheadpmu
>>>>> +          description:
>>>>> +            The T-Head performance monitor extension for counter overflow. For more
>>>>> +            details, see the chapter 12 in the Xuantie C906 user manual.
>>>>> +            https://github.com/T-head-Semi/openc906/tree/main/doc
>>>>> +
>>>>>  additionalProperties: true
>>>>>  ...
>>>>> --
>>>>> 2.34.1
>>>>>
>>>> Reviewed-by: Guo Ren <guoren@...nel.org>
>>>
>>> Thanks for the review.
>>> Would you share document about T-Head PMU?
>>>
>>
>> Hi, Peter Lin:
>>
>> You can use the following two document to get all events:
>> https://github.com/T-head-Semi/openc906/tree/main/doc
>> https://github.com/T-head-Semi/openc910/tree/main/doc
>>
>> There are also some RTL code can describe these events:
>> https://github.com/T-head-Semi/openc910/blob/e0c4ad8ec7f8c70f649d826ebd6c949086453272/C910_RTL_FACTORY/gen_rtl/pmu/rtl/ct_hpcp_top.v#L1123
>> https://github.com/T-head-Semi/openc906/blob/af5614d72de7e5a4b8609c427d2e20af1deb21c4/C906_RTL_FACTORY/gen_rtl/pmu/rtl/aq_hpcp_top.v#L543
>>
>> The perf events json can also be used as document, this is already
>> applied (with more detailed explanation):
>> https://lore.kernel.org/all/IA1PR20MB495325FCF603BAA841E29281BBBAA@IA1PR20MB4953.namprd20.prod.outlook.com/
>
>Thanks for reaching out!
>The updated description will be:
>
>- const: xtheadpmu
>  description:
>    The T-Head performance monitor extension for counter overflow, as ratified
>    in commit bd9206 ("Initial commit") of Xuantie C906 user manual.
>    https://github.com/T-head-Semi/openc906/tree/main/doc
>
>Is it OK with you?
>

I suggest using perf event json as event description. The jsons provide
more detailed explanation for these events than the user manual.

>Best regards,
>Peter Lin
>
>> Best regards,
>> Inochi
>

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