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Message-ID: <20231130134550.GN8402@pendragon.ideasonboard.com>
Date:   Thu, 30 Nov 2023 15:45:50 +0200
From:   Laurent Pinchart <laurent.pinchart@...asonboard.com>
To:     Paul Elder <paul.elder@...asonboard.com>
Cc:     linux-media@...r.kernel.org, linux-rockchip@...ts.infradead.org,
        kieran.bingham@...asonboard.com, tomi.valkeinen@...asonboard.com,
        umang.jain@...asonboard.com, Dafna Hirschfeld <dafna@...tmail.com>,
        Mauro Carvalho Chehab <mchehab@...nel.org>,
        Heiko Stuebner <heiko@...ech.de>,
        "moderated list:ARM/Rockchip SoC support" 
        <linux-arm-kernel@...ts.infradead.org>,
        open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/3] media: rkisp1: regs: Consolidate MI interrupt wrap
 fields

Hi Paul,

Thank you for the patch.

On Wed, Nov 29, 2023 at 06:29:54PM +0900, Paul Elder wrote:
> Consolidate the wraparound fields in the memory interface interrupt
> status registers, so that it can be more succinctly expressed by taking
> the stream ID (main or self) as a parameter.
> 
> Signed-off-by: Paul Elder <paul.elder@...asonboard.com>

Reviewed-by: Laurent Pinchart <laurent.pinchart@...asonboard.com>

> ---
>  drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h | 9 +++------
>  1 file changed, 3 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
> index 350f452e676f..bea69a0d766a 100644
> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
> @@ -172,12 +172,9 @@
>  #define RKISP1_CIF_MI_FRAME(stream)			BIT((stream)->id)
>  #define RKISP1_CIF_MI_MBLK_LINE				BIT(2)
>  #define RKISP1_CIF_MI_FILL_MP_Y				BIT(3)
> -#define RKISP1_CIF_MI_WRAP_MP_Y				BIT(4)
> -#define RKISP1_CIF_MI_WRAP_MP_CB			BIT(5)
> -#define RKISP1_CIF_MI_WRAP_MP_CR			BIT(6)
> -#define RKISP1_CIF_MI_WRAP_SP_Y				BIT(7)
> -#define RKISP1_CIF_MI_WRAP_SP_CB			BIT(8)
> -#define RKISP1_CIF_MI_WRAP_SP_CR			BIT(9)
> +#define RKISP1_CIF_MI_WRAP_Y(stream)			BIT(4 + (stream)->id * 3)
> +#define RKISP1_CIF_MI_WRAP_CB(stream)			BIT(5 + (stream)->id * 3)
> +#define RKISP1_CIF_MI_WRAP_CR(stream)			BIT(6 + (stream)->id * 3)
>  #define RKISP1_CIF_MI_DMA_READY				BIT(11)
>  
>  /* MI_STATUS */

-- 
Regards,

Laurent Pinchart

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