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Message-ID: <AM0PR04MB5956E863DA1295E96EC5DBC68B81A@AM0PR04MB5956.eurprd04.prod.outlook.com>
Date:   Fri, 1 Dec 2023 17:00:26 +0000
From:   Roy Zang <roy.zang@....com>
To:     Frank Li <frank.li@....com>,
        "manivannan.sadhasivam@...aro.org" <manivannan.sadhasivam@...aro.org>
CC:     "bhelgaas@...gle.com" <bhelgaas@...gle.com>,
        "imx@...ts.linux.dev" <imx@...ts.linux.dev>,
        "kw@...ux.com" <kw@...ux.com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        "linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>,
        "lpieralisi@...nel.org" <lpieralisi@...nel.org>,
        "M.H. Lian" <minghuan.lian@....com>,
        Mingkai Hu <mingkai.hu@....com>,
        "robh@...nel.org" <robh@...nel.org>
Subject: RE: [PATCH v5 4/4] PCI: layerscape: Add suspend/resume for ls1043a

> From: Frank Li <frank.li@....com>
> Subject: [PATCH v5 4/4] PCI: layerscape: Add suspend/resume for ls1043a
> 
> Add suspend/resume support for Layerscape LS1043a.
> 
> In the suspend path, PME_Turn_Off message is sent to the endpoint to
> transition the link to L2/L3_Ready state. In this SoC, there is no way to check if
> the controller has received the PME_To_Ack from the endpoint or not. So to be
> on the safer side, the driver just waits for PCIE_PME_TO_L2_TIMEOUT_US
> before asserting the SoC specific PMXMTTURNOFF bit to complete the
> PME_Turn_Off handshake. Then the link would enter L2/L3 state depending on
> the VAUX supply.
> 
> In the resume path, the link is brought back from L2 to L0 by doing a software
> reset.
> 
> Signed-off-by: Frank Li <Frank.Li@....com>
Acked-by:  Roy Zang <Roy.Zang@....com>
Roy

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