linux-kernel - Re: [PATCH 07/14] pinctrl: renesas: rzg2l: Add support to select power source for Ethernet pins

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Message-ID: <CAMuHMdWFDD=c7f-jbB88BjMa75VBhjSrVK-E0OYYQ-gr_hi-zQ@mail.gmail.com>
Date:   Fri, 1 Dec 2023 18:11:17 +0100
From:   Geert Uytterhoeven <geert@...ux-m68k.org>
To:     Claudiu <claudiu.beznea@...on.dev>
Cc:     s.shtylyov@....ru, davem@...emloft.net, edumazet@...gle.com,
        kuba@...nel.org, pabeni@...hat.com, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
        linux@...linux.org.uk, magnus.damm@...il.com,
        mturquette@...libre.com, sboyd@...nel.org,
        linus.walleij@...aro.org, p.zabel@...gutronix.de, arnd@...db.de,
        m.szyprowski@...sung.com, alexandre.torgue@...s.st.com, afd@...com,
        broonie@...nel.org, alexander.stein@...tq-group.com,
        eugen.hristev@...labora.com, sergei.shtylyov@...il.com,
        prabhakar.mahadev-lad.rj@...renesas.com,
        biju.das.jz@...renesas.com, linux-renesas-soc@...r.kernel.org,
        netdev@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-clk@...r.kernel.org, linux-gpio@...r.kernel.org,
        Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
Subject: Re: [PATCH 07/14] pinctrl: renesas: rzg2l: Add support to select
 power source for Ethernet pins

Hi Claudiu,

On Mon, Nov 20, 2023 at 8:01 AM Claudiu <claudiu.beznea@...on.dev> wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
>
> For Ethernet pins GPIO controller available on RZ/G3S (but also on RZ/G2L)
> allows setting the power source. Based on the interface b/w Ethernet
> controller and Ethernet PHY and board design specific power source need to
> be selected. The GPIO controller allow 1.8V, 2.5V and 3.3V power source
> selection for Ethernet pins and this could be selected though ETHX_POC
> registers (X={0, 1}).
>
> Commit adjust the driver to support this and does proper instantiation
> for RZ/G3S and RZ/G2L SoC. On RZ/G2L only get operation has been tested
> at the moment.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>

Thanks for your patch!

> --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> @@ -623,7 +632,16 @@ static int rzg2l_get_power_source(struct rzg2l_pinctrl *pctrl, u32 pin, u32 caps
>         if (pwr_reg < 0)
>                 return pwr_reg;
>
> -       return (readl(pctrl->base + pwr_reg) & PVDD_MASK) ? 1800 : 3300;

This removes the last user of PVDD_MASK. I guess it can be removed,
as all unused register bits are documented to read as zeroes.

> +       val = readl(pctrl->base + pwr_reg);

While these registers are documented to support access sizes of
8/16/32 bits on RZ/G3S, RZ/G2L is limited to 8 bits, so this should
have used readb() from the beginning.

> +       if (val == PVDD_1800)
> +               return 1800;
> +       if (val == PVDD_2500)
> +               return 2500;
> +       if (val == PVDD_3300)
> +               return 3300;
> +
> +       /* Should not happen. */
> +       return -EINVAL;

Please use a switch() statement.

>  }
>
>  static int rzg2l_set_power_source(struct rzg2l_pinctrl *pctrl, u32 pin, u32 caps, u32 ps)
> @@ -631,17 +649,27 @@ static int rzg2l_set_power_source(struct rzg2l_pinctrl *pctrl, u32 pin, u32 caps
>         const struct rzg2l_hwcfg *hwcfg = pctrl->data->hwcfg;
>         const struct rzg2l_register_offsets *regs = &hwcfg->regs;
>         int pwr_reg;
> +       u32 val;
>
>         if (caps & PIN_CFG_SOFT_PS) {
>                 pctrl->settings[pin].power_source = ps;
>                 return 0;
>         }
>
> +       if (ps == 1800)
> +               val = PVDD_1800;
> +       else if (ps == 2500)
> +               val = PVDD_2500;
> +       else if (ps == 3300)
> +               val = PVDD_3300;
> +       else
> +               return -EINVAL;

Please use a switch() statement.

> +
>         pwr_reg = rzg2l_caps_to_pwr_reg(regs, caps);
>         if (pwr_reg < 0)
>                 return pwr_reg;
>
> -       writel((ps == 1800) ? PVDD_1800 : PVDD_3300, pctrl->base + pwr_reg);
> +       writel(val, pctrl->base + pwr_reg);

writeb() for RZ/G2L.

>         pctrl->settings[pin].power_source = ps;
>
>         return 0;

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds