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Message-ID: <24c6be96-fa79-46d9-be17-9eb198e215e3@linaro.org>
Date:   Fri, 1 Dec 2023 22:34:22 +0100
From:   Konrad Dybcio <konrad.dybcio@...aro.org>
To:     Sibi Sankar <quic_sibis@...cinc.com>, andersson@...nel.org,
        robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        catalin.marinas@....com, ulf.hansson@...aro.org
Cc:     agross@...nel.org, conor+dt@...nel.org, ayan.kumar.halder@....com,
        j@...nau.net, dmitry.baryshkov@...aro.org, nfraprado@...labora.com,
        m.szyprowski@...sung.com, u-kumar1@...com, peng.fan@....com,
        lpieralisi@...nel.org, quic_rjendra@...cinc.com,
        abel.vesa@...aro.org, linux-arm-msm@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, quic_tsoni@...cinc.com,
        neil.armstrong@...aro.org
Subject: Re: [PATCH V4 3/5] arm64: dts: qcom: Add base X1E80100 dtsi and the
 QCP dts

On 30.11.2023 20:26, Sibi Sankar wrote:
> From: Rajendra Nayak <quic_rjendra@...cinc.com>
> 
> Add base dtsi and QCP board (Qualcomm Compute Platform) dts file for
> X1E80100 SoC, describing the CPUs, GCC and RPMHCC clock controllers,
> geni UART, interrupt controller, TLMM, reserved memory, interconnects,
> SMMU and LLCC nodes.
> 
> Co-developed-by: Abel Vesa <abel.vesa@...aro.org>
> Signed-off-by: Abel Vesa <abel.vesa@...aro.org>
> Signed-off-by: Rajendra Nayak <quic_rjendra@...cinc.com>
> Co-developed-by: Sibi Sankar <quic_sibis@...cinc.com>
> Signed-off-by: Sibi Sankar <quic_sibis@...cinc.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@...aro.org>

Konrad

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