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Message-ID: <CAA8EJpof5LO7pyXaqgtbL=sL2a2Te2tzLF-NrTFT7n58pB3iww@mail.gmail.com>
Date: Fri, 1 Dec 2023 09:39:43 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Jessica Zhang <quic_jesszhan@...cinc.com>
Cc: Rob Clark <robdclark@...il.com>, Sean Paul <sean@...rly.run>,
Marijn Suijten <marijn.suijten@...ainline.org>,
David Airlie <airlied@...il.com>,
Daniel Vetter <daniel@...ll.ch>, quic_abhinavk@...cinc.com,
linux-arm-msm@...r.kernel.org, dri-devel@...ts.freedesktop.org,
freedreno@...ts.freedesktop.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 0/2] drm/msm/dpu: INTF CRC configuration cleanups and fix
On Fri, 1 Dec 2023 at 03:31, Jessica Zhang <quic_jesszhan@...cinc.com> wrote:
>
> This series drops the frame_count and enable parameters (as they're always
> set to the same value). It also sets input_sel=0x1 for INTF.
>
> Signed-off-by: Jessica Zhang <quic_jesszhan@...cinc.com>
> ---
> Jessica Zhang (2):
> drm/msm/dpu: Drop enable and frame_count parameters from dpu_hw_setup_misr()
> drm/msm/dpu: Set input_sel bit for INTF
Please change the order of the commits: fix (input_sel) comes first,
then comes the improvement.
Otherwise if one needs to backport this fix, they either need to pick
up the irrelevant patch, or they have to rework the fix.
>
> drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 4 ++--
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 4 ++--
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 6 +++---
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h | 4 ++--
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 6 +++---
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h | 3 ++-
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c | 18 +++++++-----------
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h | 11 +++++------
> 8 files changed, 26 insertions(+), 30 deletions(-)
> ---
> base-commit: 4047f50eb64d980fcd581a19bbe6164dab25ebc7
> change-id: 20231122-encoder-fixup-61c190b16085
>
> Best regards,
> --
> Jessica Zhang <quic_jesszhan@...cinc.com>
>
--
With best wishes
Dmitry
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