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Message-ID: <8250291c-13ef-4072-92d6-f3d7953d6521@collabora.com>
Date: Fri, 1 Dec 2023 10:22:54 +0100
From: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>
To: Michael Walle <mwalle@...nel.org>,
Chun-Kuang Hu <chunkuang.hu@...nel.org>,
Philipp Zabel <p.zabel@...gutronix.de>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Maxime Ripard <mripard@...nel.org>,
Thomas Zimmermann <tzimmermann@...e.de>,
David Airlie <airlied@...il.com>,
Daniel Vetter <daniel@...ll.ch>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Chunfeng Yun <chunfeng.yun@...iatek.com>,
Vinod Koul <vkoul@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Jitao Shi <jitao.shi@...iatek.com>,
Xinlei Lee <xinlei.lee@...iatek.com>
Cc: dri-devel@...ts.freedesktop.org,
linux-mediatek@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-phy@...ts.infradead.org
Subject: Re: [PATCH 4/4] drm/mediatek: support the DSI0 output on the MT8195
VDOSYS0
Il 30/11/23 13:47, Michael Walle ha scritto:
>> With the latest dynamic selection of the output component, we can now
>> support different outputs. Move current output component into the
>> dynamic routes array and add the new DSI0 output.
>>
>> Signed-off-by: Michael Walle <mwalle@...nel.org>
>> ---
>> drivers/gpu/drm/mediatek/mtk_drm_drv.c | 8 +++++++-
>> 1 file changed, 7 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
>> b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
>> index 2b0c35cacbc6..6fa88976376e 100644
>> --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
>> +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
>> @@ -222,7 +222,11 @@ static const unsigned int mt8195_mtk_ddp_main[] = {
>> DDP_COMPONENT_DITHER0,
>> DDP_COMPONENT_DSC0,
>> DDP_COMPONENT_MERGE0,
>> - DDP_COMPONENT_DP_INTF0,
>
> Please disregard this patch (the others are ok). There must gone something
> wrong during my testing. DDP_COMPONENT_MERGE0 won't work with
> DDP_COMPONENT_DSI0. If anyone has more insights, I'm all ears.
>
I was *convinced* that the MERGE0 SOUT was connected to DSI0!!!
...but you're right, here, and thanks for catching that: there's no way to
get MERGE0 connected to DSI0; if you check in the datasheet for VDO_SEL_IN,
you can get data from MERGE0 only for DSI*1*, not 0.
The only way is to connect DSC_WRAP0 (DDP_COMPONENT_DSC0 in mtk_drm_drv btw)
directly to DSI0 (or dither to dsi0)... unless there is a way to change the
pinmux to invert the pins for DSI0/1?
You could assign the DSI1 controller to the one that is currently DSI0 for you.
That would solve the issue here.
Cheers!
Angelo
> -michael
>
>> +};
>> +
>> +static const struct mtk_drm_route mt8195_mtk_ddp_main_routes[] = {
>> + { 0, DDP_COMPONENT_DP_INTF0 },
>> + { 0, DDP_COMPONENT_DSI0 },
>> };
>>
>> static const unsigned int mt8195_mtk_ddp_ext[] = {
>> @@ -308,6 +312,8 @@ static const struct mtk_mmsys_driver_data
>> mt8192_mmsys_driver_data = {
>> static const struct mtk_mmsys_driver_data mt8195_vdosys0_driver_data = {
>> .main_path = mt8195_mtk_ddp_main,
>> .main_len = ARRAY_SIZE(mt8195_mtk_ddp_main),
>> + .conn_routes = mt8195_mtk_ddp_main_routes,
>> + .num_conn_routes = ARRAY_SIZE(mt8195_mtk_ddp_main_routes),
>> .mmsys_dev_num = 2,
>> };
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