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Message-ID: <20231204182245.33683-2-afd@ti.com>
Date: Mon, 4 Dec 2023 12:22:36 -0600
From: Andrew Davis <afd@...com>
To: Frank Binns <frank.binns@...tec.com>,
Donald Robson <donald.robson@...tec.com>,
Matt Coster <matt.coster@...tec.com>,
"H . Nikolaus Schaller" <hns@...delico.com>,
Adam Ford <aford173@...il.com>,
Ivaylo Dimitrov <ivo.g.dimitrov.75@...il.com>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Maxime Ripard <mripard@...nel.org>,
Thomas Zimmermann <tzimmermann@...e.de>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Chen-Yu Tsai <wens@...e.org>,
Jernej Skrabec <jernej.skrabec@...il.com>,
Samuel Holland <samuel@...lland.org>,
BenoƮt Cousson <bcousson@...libre.com>,
Tony Lindgren <tony@...mide.com>, Nishanth Menon <nm@...com>,
Vignesh Raghavendra <vigneshr@...com>,
Tero Kristo <kristo@...nel.org>,
Paul Cercueil <paul@...pouillou.net>
CC: <dri-devel@...ts.freedesktop.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-sunxi@...ts.linux.dev>, <linux-omap@...r.kernel.org>,
<linux-mips@...r.kernel.org>, Andrew Davis <afd@...com>
Subject: [PATCH RFC 01/10] dt-bindings: gpu: Add PowerVR Series5 SGX GPUs
The Imagination PowerVR Series5 "SGX" GPU is part of several SoCs from
multiple vendors. Describe how the SGX GPU is integrated in these SoC,
including register space and interrupts. Clocks, reset, and power domain
information is SoC specific.
Signed-off-by: Andrew Davis <afd@...com>
---
.../devicetree/bindings/gpu/img,powervr.yaml | 69 +++++++++++++++++--
1 file changed, 63 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/gpu/img,powervr.yaml b/Documentation/devicetree/bindings/gpu/img,powervr.yaml
index a13298f1a1827..9f036891dad0b 100644
--- a/Documentation/devicetree/bindings/gpu/img,powervr.yaml
+++ b/Documentation/devicetree/bindings/gpu/img,powervr.yaml
@@ -11,11 +11,33 @@ maintainers:
- Frank Binns <frank.binns@...tec.com>
properties:
+ $nodename:
+ pattern: '^gpu@[a-f0-9]+$'
+
compatible:
- items:
- - enum:
- - ti,am62-gpu
- - const: img,img-axe # IMG AXE GPU model/revision is fully discoverable
+ oneOf:
+ - items:
+ - enum:
+ - ti,am62-gpu
+ - const: img,img-axe # IMG AXE GPU model/revision is fully discoverable
+ - items:
+ - enum:
+ - ti,omap3430-gpu # Rev 121
+ - ti,omap3630-gpu # Rev 125
+ - const: img,powervr-sgx530
+ - items:
+ - enum:
+ - ingenic,jz4780-gpu # Rev 130
+ - ti,omap4430-gpu # Rev 120
+ - const: img,powervr-sgx540
+ - items:
+ - enum:
+ - allwinner,sun6i-a31-gpu # MP2 Rev 115
+ - ti,omap4470-gpu # MP1 Rev 112
+ - ti,omap5432-gpu # MP2 Rev 105
+ - ti,am5728-gpu # MP2 Rev 116
+ - ti,am6548-gpu # MP1 Rev 117
+ - const: img,powervr-sgx544
reg:
maxItems: 1
@@ -40,8 +62,6 @@ properties:
required:
- compatible
- reg
- - clocks
- - clock-names
- interrupts
additionalProperties: false
@@ -56,6 +76,43 @@ allOf:
properties:
clocks:
maxItems: 1
+ required:
+ - clocks
+ - clock-names
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: ti,am654-sgx544
+ then:
+ properties:
+ power-domains:
+ minItems: 1
+ required:
+ - power-domains
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: allwinner,sun6i-a31-gpu
+ then:
+ properties:
+ clocks:
+ minItems: 2
+ clock-names:
+ minItems: 2
+ required:
+ - clocks
+ - clock-names
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: ingenic,jz4780-gpu
+ then:
+ required:
+ - clocks
+ - clock-names
examples:
- |
--
2.39.2
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