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Message-ID: <ghozqqj3ka6ntbofbpol2zf6sa7lt5ppqnsmnqbvqr5nwgx4ox@5kndla2nf54n>
Date: Mon, 4 Dec 2023 22:46:55 +0100
From: Marijn Suijten <marijn.suijten@...ainline.org>
To: Jonathan Marek <jonathan@...ek.ca>
Cc: freedreno@...ts.freedesktop.org, Rob Clark <robdclark@...il.com>,
Abhinav Kumar <quic_abhinavk@...cinc.com>,
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
Sean Paul <sean@...rly.run>, David Airlie <airlied@...il.com>,
Daniel Vetter <daniel@...ll.ch>,
Jessica Zhang <quic_jesszhan@...cinc.com>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Jiasheng Jiang <jiasheng@...as.ac.cn>,
"open list:DRM DRIVER FOR MSM ADRENO GPU"
<linux-arm-msm@...r.kernel.org>,
"open list:DRM DRIVER FOR MSM ADRENO GPU"
<dri-devel@...ts.freedesktop.org>,
open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 2/6] drm/msm/dsi: set video mode widebus enable bit
when widebus is enabled
On 2023-11-14 17:58:30, Jonathan Marek wrote:
> The value returned by msm_dsi_wide_bus_enabled() doesn't match what the
> driver is doing in video mode. Fix that by actually enabling widebus for
> video mode.
>
> Fixes: efcbd6f9cdeb ("drm/msm/dsi: Enable widebus for DSI")
> Signed-off-by: Jonathan Marek <jonathan@...ek.ca>
Conditional r-b assuming this will be submitted to mesa, otherwise it'll
disappear when the next person updates and regenerates these bindings.
Reviewed-by: Marijn Suijten <marijn.suijten@...ainline.org>
> ---
> drivers/gpu/drm/msm/dsi/dsi.xml.h | 1 +
> drivers/gpu/drm/msm/dsi/dsi_host.c | 2 ++
> 2 files changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/msm/dsi/dsi.xml.h b/drivers/gpu/drm/msm/dsi/dsi.xml.h
> index 2a7d980e12c3..f0b3cdc020a1 100644
> --- a/drivers/gpu/drm/msm/dsi/dsi.xml.h
> +++ b/drivers/gpu/drm/msm/dsi/dsi.xml.h
> @@ -231,6 +231,7 @@ static inline uint32_t DSI_VID_CFG0_TRAFFIC_MODE(enum dsi_traffic_mode val)
> #define DSI_VID_CFG0_HSA_POWER_STOP 0x00010000
> #define DSI_VID_CFG0_HBP_POWER_STOP 0x00100000
> #define DSI_VID_CFG0_HFP_POWER_STOP 0x01000000
> +#define DSI_VID_CFG0_DATABUS_WIDEN 0x02000000
> #define DSI_VID_CFG0_PULSE_MODE_HSA_HE 0x10000000
>
> #define REG_DSI_VID_CFG1 0x0000001c
> diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
> index deeecdfd6c4e..f2c1cbd08d4d 100644
> --- a/drivers/gpu/drm/msm/dsi/dsi_host.c
> +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
> @@ -745,6 +745,8 @@ static void dsi_ctrl_enable(struct msm_dsi_host *msm_host,
> data |= DSI_VID_CFG0_TRAFFIC_MODE(dsi_get_traffic_mode(flags));
> data |= DSI_VID_CFG0_DST_FORMAT(dsi_get_vid_fmt(mipi_fmt));
> data |= DSI_VID_CFG0_VIRT_CHANNEL(msm_host->channel);
> + if (msm_dsi_host_is_wide_bus_enabled(&msm_host->base))
> + data |= DSI_VID_CFG0_DATABUS_WIDEN;
> dsi_write(msm_host, REG_DSI_VID_CFG0, data);
>
> /* Do not swap RGB colors */
> --
> 2.26.1
>
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