linux-kernel - Re: [PATCH] x86_64: test xmm/ymm register state after execve(2)

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Message-ID: <cd27c804-a289-4b6f-9dd1-5c4b3bdc564b@intel.com>
Date:   Tue, 5 Dec 2023 12:39:32 -0800
From:   Dave Hansen <dave.hansen@...el.com>
To:     Alexey Dobriyan <adobriyan@...il.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        Dave Hansen <dave.hansen@...ux.intel.com>, x86@...nel.org
Cc:     linux-kernel@...r.kernel.org, "H. Peter Anvin" <hpa@...or.com>
Subject: Re: [PATCH] x86_64: test xmm/ymm register state after execve(2)

On 12/5/23 06:21, Alexey Dobriyan wrote:
> Test that xmm/ymm registers are cleared immediately after execve(2).
> 
> It is opportunistically named "check_xmm_ymm_zmm" because I don't have
> AVX-512 machine but it will be trivial to extend without renaming stuff.

Hi Alexey,

This looks pretty useful.  I know we've had bugs in this area in the
past.  Was there any recent motivation for this, though?  Just curious.

> --- /dev/null
> +++ b/tools/testing/selftests/x86/check_xmm_ymm_zmm.c
> @@ -0,0 +1,176 @@
> +/*
> + * Copyright (c) 2023 Alexey Dobriyan <adobriyan@...il.com>
> + *
> + * Permission to use, copy, modify, and distribute this software for any
> + * purpose with or without fee is hereby granted, provided that the above
> + * copyright notice and this permission notice appear in all copies.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
> + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
> + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
> + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
> + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
> + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
> + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
> + */
> +/* Test that xmm, ymm registers are cleared immediately after execve(2). */

Can this be trimmed down to a nice SPDX header?

> +#include <stdio.h>
> +#include <string.h>
> +
> +#if   defined __amd64__
> +#elif defined __i386__
> +#error "fix register count, SSE2 detection"
> +#else
> +#error
> +#endif
> +
> +#define array_size(a)	(sizeof(a) / sizeof(a[0]))
> +
> +typedef char xmm_t[16];
> +static const xmm_t xmm_z;
> +static xmm_t xmm[16];
> +
> +typedef char ymm_t[32];
> +static const ymm_t ymm_z;
> +static ymm_t ymm[16];
> +
> +enum {
> +	TEST_XMM = 1,
> +	TEST_YMM = 2,
> +};
> +static volatile char g_test;
> +
> +/*
> + * Homework: write and install #UD handler in assembly and just start
> + * executing AVX-512/AVX2/SSE2 instructions falling back SIMD ladder
> + * if necessary.
> + *
> + * jk, use cpuid instead like any normal programmer would do.
> + */
> +asm (
> +".pushsection .text;"
> +".type e_entry,@function;"
> +".global e_entry;"
> +"e_entry:"
> +	/* test AVX2 support */
> +	"mov $7, %eax;"
> +	"xor %ecx, %ecx;"
> +	"cpuid;"
> +	"bt $5, %ebx;"
> +	"jnc .Ltest_xmm;"
> +
> +	"vmovdqu %ymm0, ymm + 32 * 0;"
> +	"vmovdqu %ymm1, ymm + 32 * 1;
...
> 
> +".Ltest_xmm:"
> +	"movdqu %xmm0, xmm + 16 * 0;"
> +	"movdqu %xmm1, xmm + 16 * 1;"

Does this work on systems without XMMs?  I know it's not common these
days but it's possible, especially in VMs.