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Message-ID: <SJ1PR11MB60835628D38AD099BE401C47FC85A@SJ1PR11MB6083.namprd11.prod.outlook.com>
Date: Tue, 5 Dec 2023 23:25:52 +0000
From: "Luck, Tony" <tony.luck@...el.com>
To: "Zhuo, Qiuxu" <qiuxu.zhuo@...el.com>
CC: Borislav Petkov <bp@...en8.de>, Aristeu Rozanski <aris@...hat.com>,
"Mauro Carvalho Chehab" <mchehab@...nel.org>,
"linux-edac@...r.kernel.org" <linux-edac@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH 0/5] EDAC/igen6: Add EDAC support for several Intel SoCs
with IBECC
> As these SoCs share similar IBECC registers, most of them are having
> compute die IDs added for EDAC support. There are some minor differences
> among them regarding IBECC presence detection, the number of memory
> controllers, and the most significant bit of the error address.
Applied series. Thanks.
-Tony
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