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Message-ID: <20231205062403.14848-6-quic_sibis@quicinc.com>
Date:   Tue, 5 Dec 2023 11:54:03 +0530
From:   Sibi Sankar <quic_sibis@...cinc.com>
To:     <andersson@...nel.org>, <konrad.dybcio@...aro.org>,
        <robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
        <catalin.marinas@....com>, <ulf.hansson@...aro.org>
CC:     <agross@...nel.org>, <conor+dt@...nel.org>,
        <ayan.kumar.halder@....com>, <j@...nau.net>,
        <dmitry.baryshkov@...aro.org>, <nfraprado@...labora.com>,
        <m.szyprowski@...sung.com>, <u-kumar1@...com>, <peng.fan@....com>,
        <lpieralisi@...nel.org>, <quic_rjendra@...cinc.com>,
        <abel.vesa@...aro.org>, <linux-arm-msm@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>, <quic_tsoni@...cinc.com>,
        <neil.armstrong@...aro.org>, Sibi Sankar <quic_sibis@...cinc.com>
Subject: [PATCH V5 5/5] arm64: defconfig: Enable X1E80100 SoC base configs

From: Rajendra Nayak <quic_rjendra@...cinc.com>

Enable GCC, Pinctrl and Interconnect configs for Qualcomm's X1E80100 SoC
which is required to boot X1E80100 QCP/CRD boards to a console shell. The
configs are required to be marked as builtin and not modules due to the
console driver dependencies.

Signed-off-by: Rajendra Nayak <quic_rjendra@...cinc.com>
Co-developed-by: Sibi Sankar <quic_sibis@...cinc.com>
Signed-off-by: Sibi Sankar <quic_sibis@...cinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
---

v5:
* Rename gcc config to CLK_X1E80100_GCC [Krzysztof/Abel/Bryan].

 arch/arm64/configs/defconfig | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 3e7832c64708..ffaa9f9fa10f 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -616,6 +616,7 @@ CONFIG_PINCTRL_SM8450_LPASS_LPI=m
 CONFIG_PINCTRL_SC8280XP_LPASS_LPI=m
 CONFIG_PINCTRL_SM8550=y
 CONFIG_PINCTRL_SM8550_LPASS_LPI=m
+CONFIG_PINCTRL_X1E80100=y
 CONFIG_PINCTRL_LPASS_LPI=m
 CONFIG_GPIO_AGGREGATOR=m
 CONFIG_GPIO_ALTERA=m
@@ -1220,6 +1221,7 @@ CONFIG_COMMON_CLK_MT8192_SCP_ADSP=y
 CONFIG_COMMON_CLK_MT8192_VDECSYS=y
 CONFIG_COMMON_CLK_MT8192_VENCSYS=y
 CONFIG_COMMON_CLK_QCOM=y
+CONFIG_CLK_X1E80100_GCC=y
 CONFIG_QCOM_A53PLL=y
 CONFIG_QCOM_CLK_APCS_MSM8916=y
 CONFIG_QCOM_CLK_APCC_MSM8996=y
@@ -1528,6 +1530,7 @@ CONFIG_INTERCONNECT_QCOM_SM8250=m
 CONFIG_INTERCONNECT_QCOM_SM8350=m
 CONFIG_INTERCONNECT_QCOM_SM8450=y
 CONFIG_INTERCONNECT_QCOM_SM8550=y
+CONFIG_INTERCONNECT_QCOM_X1E80100=y
 CONFIG_COUNTER=m
 CONFIG_RZ_MTU3_CNT=m
 CONFIG_HTE=y
-- 
2.17.1

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