linux-kernel - Re: [PATCH v4 2/4] dt-bindings: clock: sophgo: Add SG2042 bindings

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Tue, 5 Dec 2023 09:08:58 +0100
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Chen Wang <unicornxw@...il.com>, aou@...s.berkeley.edu,
        chao.wei@...hgo.com, conor@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, mturquette@...libre.com,
        palmer@...belt.com, paul.walmsley@...ive.com,
        richardcochran@...il.com, robh+dt@...nel.org, sboyd@...nel.org,
        devicetree@...r.kernel.org, linux-clk@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
        haijiao.liu@...hgo.com, xiaoguang.xing@...hgo.com,
        guoren@...nel.org, jszhang@...nel.org, inochiama@...look.com,
        samuel.holland@...ive.com
Cc:     Chen Wang <unicorn_wang@...look.com>
Subject: Re: [PATCH v4 2/4] dt-bindings: clock: sophgo: Add SG2042 bindings

On 05/12/2023 01:23, Chen Wang wrote:
> From: Chen Wang <unicorn_wang@...look.com>
> 
> Add bindings for the clock generator on the SG2042 RISC-V SoC.

A nit, subject: drop second/last, redundant "bindings". The
"dt-bindings" prefix is already stating that these are bindings.

> +
> +maintainers:
> +  - Chen Wang <unicorn_wang@...look.com>
> +
> +properties:
> +  compatible:
> +    items:

Drop items, the same in previous patch. We keep simplified form for
compatibles usually.

> +      - const: sophgo,sg2042-clkgen
> +
> +  reg:
> +    maxItems: 1
> +
> +  system-ctrl:

Missing vendor prefix.

> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description: a phandle to SG2042 System Controller node.

Add explanation how it is used and what its purpose is.

> +
> +  clocks:
> +    items:
> +      - description: Clock Generation IC (25 MHz)
> +
> +  '#clock-cells':
> +    const: 1
> +    description:
> +      See <dt-bindings/clock/sophgo,sg2042-clkgen.h> for valid indices.
> +
> +required:
> +  - compatible
> +  - reg
> +  - system-ctrl
> +  - clocks
> +  - '#clock-cells'
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    clock-controller@...12000 {
> +        compatible = "sophgo,sg2042-clkgen";
> +        reg = <0x30012000 0x1000>;
> +        system-ctrl = <&sys_ctrl>;
> +        clocks = <&cgi>;
> +        #clock-cells = <1>;
> +    };
> diff --git a/include/dt-bindings/clock/sophgo,sg2042-clkgen.h b/include/dt-bindings/clock/sophgo,sg2042-clkgen.h
> new file mode 100644
> index 000000000000..b12046046f1f
> --- /dev/null
> +++ b/include/dt-bindings/clock/sophgo,sg2042-clkgen.h
> @@ -0,0 +1,169 @@
> +/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
> +/*
> + * Copyright (C) 2023 Sophgo Technology Inc. All rights reserved.
> + */
> +
> +#ifndef __DT_BINDINGS_CLOCK_SOPHGO_SG2042_H__
> +#define __DT_BINDINGS_CLOCK_SOPHGO_SG2042_H__
> +
> +/* Divider clocks */
> +#define	DIV_CLK_MPLL_RP_CPU_NORMAL_0	0

No indentation after #define. Open other header files and look how it is
done there.


Best regards,
Krzysztof