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Message-ID: <87lea7uvev.ffs@tglx>
Date: Wed, 06 Dec 2023 17:51:04 +0100
From: Thomas Gleixner <tglx@...utronix.de>
To: Jacob Pan <jacob.jun.pan@...ux.intel.com>,
LKML <linux-kernel@...r.kernel.org>, X86 Kernel <x86@...nel.org>,
iommu@...ts.linux.dev, Lu Baolu <baolu.lu@...ux.intel.com>,
kvm@...r.kernel.org, Dave Hansen <dave.hansen@...el.com>,
Joerg Roedel <joro@...tes.org>,
"H. Peter Anvin" <hpa@...or.com>, Borislav Petkov <bp@...en8.de>,
Ingo Molnar <mingo@...hat.com>
Cc: Raj Ashok <ashok.raj@...el.com>,
"Tian, Kevin" <kevin.tian@...el.com>, maz@...nel.org,
peterz@...radead.org, seanjc@...gle.com,
Robin Murphy <robin.murphy@....com>,
Jacob Pan <jacob.jun.pan@...ux.intel.com>
Subject: Re: [PATCH RFC 06/13] x86/irq: Unionize PID.PIR for 64bit access
w/o casting
On Sat, Nov 11 2023 at 20:16, Jacob Pan wrote:
> Make PIR field into u64 such that atomic xchg64 can be used without ugly
> casting.
Make PIR field into... That's not a sentence.
> Suggested-by: Thomas Gleixner <tglx@...utronix.de>
> Signed-off-by: Jacob Pan <jacob.jun.pan@...ux.intel.com>
> ---
> arch/x86/include/asm/posted_intr.h | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/include/asm/posted_intr.h b/arch/x86/include/asm/posted_intr.h
> index 2cd9ac1af835..3af00f5395e4 100644
> --- a/arch/x86/include/asm/posted_intr.h
> +++ b/arch/x86/include/asm/posted_intr.h
> @@ -9,7 +9,10 @@
>
> /* Posted-Interrupt Descriptor */
> struct pi_desc {
> - u32 pir[8]; /* Posted interrupt requested */
> + union {
> + u32 pir[8]; /* Posted interrupt requested */
> + u64 pir_l[4];
pir_l is really not intuitive. What's wrong with spelling the type out
in the name: pir64[4] ?
> + };
> union {
> struct {
> /* bit 256 - Outstanding Notification */
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