linux-kernel - Re: [PATCH v2 1/6] dt-bindings: interrupt-controller: Add support for Realtek DHC SoCs

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Message-ID: <7f0c906c-9b36-4b29-bb8a-d65621e9e08b@linaro.org>
Date:   Wed, 6 Dec 2023 18:48:41 +0100
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     James Tai [戴志峰] <james.tai@...ltek.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Marc Zyngier <maz@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>
Cc:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
Subject: Re: [PATCH v2 1/6] dt-bindings: interrupt-controller: Add support for
 Realtek DHC SoCs

On 06/12/2023 16:07, James Tai [戴志峰] wrote:
> 
>     misc_irq_mux: misc_irq_mux@80 {
>       compatible = "realtek,rtd1619b-intc-misc";
>       reg = <0x00 0x80>;
>       interrupts-extended = <&gic GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
>                         <&gic GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
>                         <&gic GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
>       interrupt-controller;
>       #address-cells = <0>;
>       #interrupt-cells = <1>;
>     };

So you have strictly defined number of interrupts and the actual
interrupts per variant.

> 
>>
>> Look at all other bindings covering multiple devices and their
>> clocks/interrupts/interconnects/reg etc.
> 
> May I adopt the approach used in this YAML for my case?
> https://www.kernel.org/doc/Documentation/devicetree/bindings/timer/allwinner%2Csun4i-a10-timer.yaml


I am asking for this since few emails.

Look:
"Anyway, you must describe the items. Why this is not fixed but flexible?
Hardware has different number of pins? That's unlikely."


Best regards,
Krzysztof