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Message-ID: <20231206004656.GC1118@sol.localdomain>
Date: Tue, 5 Dec 2023 16:46:56 -0800
From: Eric Biggers <ebiggers@...nel.org>
To: Jerry Shih <jerry.shih@...ive.com>
Cc: paul.walmsley@...ive.com, palmer@...belt.com,
aou@...s.berkeley.edu, herbert@...dor.apana.org.au,
davem@...emloft.net, conor.dooley@...rochip.com, ardb@...nel.org,
conor@...nel.org, heiko@...ech.de, phoebe.chen@...ive.com,
hongrong.hsu@...ive.com, linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-crypto@...r.kernel.org
Subject: Re: [PATCH v3 00/12] RISC-V: provide some accelerated cryptography
implementations using vector extensions
On Tue, Dec 05, 2023 at 05:27:49PM +0800, Jerry Shih wrote:
> This series depend on:
> 2. support kernel-mode vector
> Link: https://lore.kernel.org/all/20230721112855.1006-1-andy.chiu@sifive.com/
> 3. vector crypto extensions detection
> Link: https://lore.kernel.org/lkml/20231017131456.2053396-1-cleger@rivosinc.com/
What's the status of getting these prerequisites merged?
- Eric
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