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Message-ID: <20231206093106.GE270430@dragon>
Date:   Wed, 6 Dec 2023 17:31:06 +0800
From:   Shawn Guo <shawnguo@...nel.org>
To:     Frank Li <Frank.li@....com>
Cc:     Conor Dooley <conor.dooley@...rochip.com>,
        alexander.stein@...tq-group.com, alexandre.belloni@...tlin.com,
        conor+dt@...nel.org, conor.culhane@...vaco.com, conor@...nel.org,
        devicetree@...r.kernel.org, festevam@...il.com, haibo.chen@....com,
        imx@...ts.linux.dev, joe@...ches.com, kernel@...gutronix.de,
        krzysztof.kozlowski+dt@...aro.org, krzysztof.kozlowski@...aro.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-i3c@...ts.infradead.org, linux-imx@....com,
        linux-kernel@...r.kernel.org, peng.fan@....com, ping.bai@....com,
        robh+dt@...nel.org, s.hauer@...gutronix.de, sherry.sun@....com,
        xiaoning.wang@....com
Subject: Re: [PATCH v2 2/2] arm64: dts: freescale: imx93: add i3c1 and i3c2

On Wed, Dec 06, 2023 at 12:46:15AM -0500, Frank Li wrote:
> On Mon, Nov 27, 2023 at 09:35:39AM +0000, Conor Dooley wrote:
> > On Mon, Nov 27, 2023 at 10:21:40AM +0800, Shawn Guo wrote:
> > > On Thu, Nov 09, 2023 at 10:51:13AM -0500, Frank Li wrote:
> > > > On Tue, Oct 17, 2023 at 03:46:57PM -0400, Frank Li wrote:
> > > > > Add I3C1 and I3C2.
> > > > > 
> > > > > Signed-off-by: Frank Li <Frank.Li@....com>
> > > > > ---
> > > > 
> > > > @Guo Shawn:
> > > > 
> > > > Driver part already merged. 
> > > > 
> > > > Please pick up dts part
> > > 
> > > Rob had a comment [1] about SoC specific compatible.  That's not what we
> > > want?
> > > 
> > > Shawn
> > > 
> > > [1] https://lkml.iu.edu/hypermail/linux/kernel/2310.2/03035.html
> > 
> > Yeah, Rob's request here looks valid to me. Should just be a bindings
> > change Frank & fall back to the "silvaco,i3c-master-v1" compatible.
> > 
> > Cheers,
> > Conor.
> 
> @shawn:
> 	rob agree on "silvaco,i3c-master-v1" compatible.

Hmm, not sure I have seen that.  Here is what I saw from Rob:

"
The real problem here is not whether we have "v1" or not, but you need
an SoC specific compatible. Unless there's a public spec where we can
know exactly how many resets, clocks, interrupts, etc.
"

Shawn

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