[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <797b9023-e56b-404b-bb4e-6e178b7ada88@linaro.org>
Date: Thu, 7 Dec 2023 17:24:48 +0000
From: Tudor Ambarus <tudor.ambarus@...aro.org>
To: Amit Kumar Mahapatra <amit.kumar-mahapatra@....com>,
broonie@...nel.org, pratyush@...nel.org, miquel.raynal@...tlin.com,
richard@....at, vigneshr@...com, sbinding@...nsource.cirrus.com,
lee@...nel.org, james.schulman@...rus.com, david.rhodes@...rus.com,
rf@...nsource.cirrus.com, perex@...ex.cz, tiwai@...e.com
Cc: linux-spi@...r.kernel.org, linux-kernel@...r.kernel.org,
michael@...le.cc, linux-mtd@...ts.infradead.org,
nicolas.ferre@...rochip.com, alexandre.belloni@...tlin.com,
claudiu.beznea@...on.dev, michal.simek@....com,
linux-arm-kernel@...ts.infradead.org, alsa-devel@...a-project.org,
patches@...nsource.cirrus.com, linux-sound@...r.kernel.org,
git@....com, amitrkcian2002@...il.com
Subject: Re: [PATCH v11 07/10] mtd: spi-nor: Add stacked memories support in
spi-nor
On 11/25/23 09:21, Amit Kumar Mahapatra wrote:
> The current implementation assumes that a maximum of two flashes are
> connected in stacked mode and both the flashes are of same make but can
> differ in sizes. So, except the sizes all other flash parameters of both
> the flashes are identical.
Too much restrictions, isn't it? Have you thought about adding a layer
on top of SPI NOR managing the stacked/parallel flashes?
Powered by blists - more mailing lists