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Message-ID: <e392ad7b78c1d6244f605f4de2755b1adf3ab2ec.1701971344.git.marcelo.schmitt1@gmail.com>
Date: Thu, 7 Dec 2023 15:38:53 -0300
From: Marcelo Schmitt <marcelo.schmitt@...log.com>
To: <apw@...onical.com>, <joe@...ches.com>, <dwaipayanray1@...il.com>,
<lukas.bulwahn@...il.com>, <paul.cercueil@...log.com>,
<Michael.Hennerich@...log.com>, <lars@...afoo.de>,
<jic23@...nel.org>, <robh+dt@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>, <conor+dt@...nel.org>,
<dan.carpenter@...aro.org>, <marcelo.schmitt1@...il.com>
CC: <linux-iio@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>
Subject: [PATCH v3 03/13] iio: adc: ad7091r: Set alert bit in config register
The ad7091r-base driver sets up an interrupt handler for firing events
when inputs are either above or below a certain threshold.
However, for the interrupt signal to come from the device it must be
configured to enable the ALERT/BUSY/GPO pin to be used as ALERT, which
was not being done until now.
Enable interrupt signals on the ALERT/BUSY/GPO pin by setting the proper
bit in the configuration register.
Signed-off-by: Marcelo Schmitt <marcelo.schmitt@...log.com>
---
drivers/iio/adc/ad7091r-base.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/iio/adc/ad7091r-base.c b/drivers/iio/adc/ad7091r-base.c
index 0f192fbecbd4..6056a66d756c 100644
--- a/drivers/iio/adc/ad7091r-base.c
+++ b/drivers/iio/adc/ad7091r-base.c
@@ -28,6 +28,7 @@
#define AD7091R_REG_RESULT_CONV_RESULT(x) ((x) & 0xfff)
/* AD7091R_REG_CONF */
+#define AD7091R_REG_CONF_ALERT_EN BIT(4)
#define AD7091R_REG_CONF_AUTO BIT(8)
#define AD7091R_REG_CONF_CMD BIT(10)
@@ -232,6 +233,11 @@ int ad7091r_probe(struct device *dev, const char *name,
iio_dev->channels = chip_info->channels;
if (irq) {
+ ret = regmap_update_bits(st->map, AD7091R_REG_CONF,
+ AD7091R_REG_CONF_ALERT_EN, BIT(4));
+ if (ret)
+ return ret;
+
dev_set_drvdata(st->dev, iio_dev);
ret = devm_request_threaded_irq(dev, irq, NULL,
ad7091r_event_handler,
--
2.42.0
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